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公开(公告)号:US20210098345A1
公开(公告)日:2021-04-01
申请号:US16988741
申请日:2020-08-10
Applicant: Novatek Microelectronics Corp.
Inventor: Chiao-Ling Huang , Tai-Hung Lin
IPC: H01L23/498 , H01L23/00 , H01L21/48 , H01L23/12
Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.
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公开(公告)号:US20190067168A1
公开(公告)日:2019-02-28
申请号:US15821846
申请日:2017-11-24
Applicant: Novatek Microelectronics Corp.
Inventor: Chiao-Ling Huang , Tai-Hung Lin
IPC: H01L23/498 , H01L23/12 , H01L21/48 , H01L23/00
Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.
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公开(公告)号:US11569162B2
公开(公告)日:2023-01-31
申请号:US16988741
申请日:2020-08-10
Applicant: Novatek Microelectronics Corp.
Inventor: Chiao-Ling Huang , Tai-Hung Lin
IPC: H01L23/498 , H01L23/00 , H01L21/48 , H01L23/12
Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.
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公开(公告)号:US10692815B2
公开(公告)日:2020-06-23
申请号:US15680202
申请日:2017-08-17
Applicant: Novatek Microelectronics Corp.
Inventor: Wei-Kuo Mai , Chiao-Ling Huang
IPC: H01L23/538 , H01L23/00 , H01L23/544 , H01L23/498 , H05K1/14 , H01L25/18
Abstract: A chip on glass package assembly includes a glass substrate, a first type chip, a second type chip and a plurality of connecting lines. The glass substrate includes an active area and a peripheral area connected to the active area. The first type chip is mounted on the peripheral area and including a processor. The second type chip is mounted on the peripheral area and located on a side of the first type chip, wherein the second type chip is different from the first type chip. The connecting lines are disposed on the peripheral area and connecting the first type chip and the second type chip.
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公开(公告)号:US20200321300A1
公开(公告)日:2020-10-08
申请号:US16910085
申请日:2020-06-24
Applicant: Novatek Microelectronics Corp.
Inventor: Ling-Chieh Li , Chiao-Ling Huang
IPC: H01L23/00
Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.
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公开(公告)号:US10777498B2
公开(公告)日:2020-09-15
申请号:US15821846
申请日:2017-11-24
Applicant: Novatek Microelectronics Corp.
Inventor: Chiao-Ling Huang , Tai-Hung Lin
IPC: H01L23/498 , H01L23/00 , H01L21/48 , H01L23/12
Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.
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公开(公告)号:US10734344B2
公开(公告)日:2020-08-04
申请号:US16030864
申请日:2018-07-10
Applicant: Novatek Microelectronics Corp.
Inventor: Ling-Chieh Li , Chiao-Ling Huang
Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.
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公开(公告)号:US20190057938A1
公开(公告)日:2019-02-21
申请号:US15680202
申请日:2017-08-17
Applicant: Novatek Microelectronics Corp.
Inventor: Wei-Kuo Mai , Chiao-Ling Huang
IPC: H01L23/538 , H01L25/18 , H01L23/00 , H01L23/544 , H05K1/14 , H01L23/498
Abstract: A chip on glass package assembly includes a glass substrate, a first type chip, a second type chip and a plurality of connecting lines. The glass substrate includes an active area and a peripheral area connected to the active area. The first type chip is mounted on the peripheral area and including a processor. The second type chip is mounted on the peripheral area and located on a side of the first type chip, wherein the second type chip is different from the first type chip. The connecting lines are disposed on the peripheral area and connecting the first type chip and the second type chip.
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公开(公告)号:US11502052B2
公开(公告)日:2022-11-15
申请号:US16910085
申请日:2020-06-24
Applicant: Novatek Microelectronics Corp.
Inventor: Ling-Chieh Li , Chiao-Ling Huang
Abstract: A chip structure including a chip body and a plurality of conductive bumps. The chip body includes an active surface and a plurality of bump pads disposed on the active surface. The conductive bumps are disposed on the active surface of the chip body and connected to the bump pads respectively, and at least one of the conductive bumps has a trapezoid shape having one pair of parallel sides and one pair of non-parallel sides.
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公开(公告)号:US20190287931A1
公开(公告)日:2019-09-19
申请号:US15922832
申请日:2018-03-15
Applicant: Novatek Microelectronics Corp.
Inventor: Chien-Chen Ko , Chiao-Ling Huang
Abstract: A chip on film package including a base film, a patterned circuit layer, a chip, an underfill portion, and a water resistant layer. The base film includes a first surface and a second surface opposite to the first surface, and the first surface includes a mounting region. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The underfill portion covers a connecting portion where the chip and the pattern circuit layer are connected. The water resistant layer at least coves an outer surface of the underfill, wherein the material of the water resistant layer includes resin and metal particles.
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