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公开(公告)号：US20230121521A1
公开(公告)日：2023-04-20
申请号：US17501985
申请日：2021-10-14
Applicant: Novatek Microelectronics Corp.
Inventor： Hao-Che Hsu , Chin-Tung Chan , Ying-Cheng Lin , Ren-Hong Luo
Abstract: A signal receiver includes a first transistor, a second transistor, a load circuit, an amplifying circuit and a load circuit. The first transistor has a first end receiving a power voltage, and a control end receive a first input signal. The second transistor has a first end receiving the power voltage, and a control end receiving a second input signal, wherein the first input signal and the second input signal are differential signals and transit between a first voltage and a reference ground voltage, the first voltage is larger than the power voltage. The load circuit is coupled to the first transistor and the second transistor. The amplifying circuit generates an output signal according a first signal on the second end of the first transistor and a second signal on the second end of the second transistor.
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公开(公告)号：US12199622B2
公开(公告)日：2025-01-14
申请号：US18534702
申请日：2023-12-10
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chin-Tung Chan
Abstract: A switching method, including: electrically coupling a switching circuit to a first impedance circuit, a second impedance circuit, a positive terminal of a frequency generation circuit and a negative terminal of the frequency generation circuit; adjusting an impedance value of the second impedance circuit according to a first clock signal and a second clock signal outputted by the frequency generation circuit; periodically conducting the negative terminal to one of the first impedance circuit and the second impedance circuit by a first switching unit of the switching circuit; and periodically conducting the positive terminal to the other one of the first impedance circuit and the second impedance circuit by a second switching unit of the switching circuit.
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Patent Agency Ranking
公开(公告)号：US20220255552A1
公开(公告)日：2022-08-11
申请号：US17661042
申请日：2022-04-27
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chin-Tung Chan
Abstract: A switching method, including: electrically coupling a switching circuit to a first impedance circuit, a second impedance circuit, a positive terminal of a frequency generation circuit and a negative terminal of the frequency generation circuit; adjusting an impedance value of the second impedance circuit according to a first clock signal and a second clock signal outputted by the frequency generation circuit; periodically conducting the negative terminal to one of the first impedance circuit and the second impedance circuit by a first switching unit of the switching circuit; and periodically conducting the positive terminal to the other one of the first impedance circuit and the second impedance circuit by a second switching unit of the switching circuit.
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公开(公告)号：US11881865B2
公开(公告)日：2024-01-23
申请号：US17661042
申请日：2022-04-27
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chin-Tung Chan
Abstract: A switching method, including: electrically coupling a switching circuit to a first impedance circuit, a second impedance circuit, a positive terminal of a frequency generation circuit and a negative terminal of the frequency generation circuit; adjusting an impedance value of the second impedance circuit according to a first clock signal and a second clock signal outputted by the frequency generation circuit; periodically conducting the negative terminal to one of the first impedance circuit and the second impedance circuit by a first switching unit of the switching circuit; and periodically conducting the positive terminal to the other one of the first impedance circuit and the second impedance circuit by a second switching unit of the switching circuit.
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公开(公告)号：US12261610B2
公开(公告)日：2025-03-25
申请号：US18496908
申请日：2023-10-29
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chin-Tung Chan , Yan-Ting Wang , Ren-Hong Luo , Chih-Wen Chen , Hao-Che Hsu , Li-Wei Lin
Abstract: A frequency locked loop circuit, comprising an operational circuit, a first impedance circuit, a second impedance circuit, a switching circuit and a frequency generation circuit. The operational circuit is configured to output an operational signal according to a voltage difference between a positive terminal and a negative terminal. The switching circuit is configured to periodically conduct the negative terminal to one of the first impedance node and the second impedance node, and periodically conduct the positive terminal to the other one of the first impedance node and the second impedance node. The frequency generation circuit is configured to periodically sample the operational signal to generate a sample signal to generate a clock signal. An operational frequency of the operational signal is an integer multiple of a sampling frequency of the frequency generation circuit.
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公开(公告)号：US12009949B2
公开(公告)日：2024-06-11
申请号：US17501985
申请日：2021-10-14
Applicant: Novatek Microelectronics Corp.
Inventor： Hao-Che Hsu , Chin-Tung Chan , Ying-Cheng Lin , Ren-Hong Luo
CPC classification number: H04L25/0272 , H03F3/45076 , H04L25/028
Abstract: A signal receiver includes a first transistor, a second transistor, a load circuit, an amplifying circuit and a load circuit. The first transistor has a first end receiving a power voltage, and a control end receive a first input signal. The second transistor has a first end receiving the power voltage, and a control end receiving a second input signal, wherein the first input signal and the second input signal are differential signals and transit between a first voltage and a reference ground voltage, the first voltage is larger than the power voltage. The load circuit is coupled to the first transistor and the second transistor. The amplifying circuit generates an output signal according a first signal on the second end of the first transistor and a second signal on the second end of the second transistor.
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公开(公告)号：US11349488B2
公开(公告)日：2022-05-31
申请号：US16727882
申请日：2019-12-26
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chin-Tung Chan
Abstract: A frequency locked loop circuit, including a frequency generation circuit, a first impedance circuit, a second impedance circuit and a switching circuit. The frequency generation circuit includes a positive terminal and a negative terminal. The frequency generation circuit outputs an output clock signal according to a voltage difference between the positive terminal and the negative terminal. The first impedance circuit and the second impedance circuit are electrically coupled to a first impedance node and a second impedance node, respectively. The second impedance circuit adjusts an impedance value of the second impedance circuit according to the output clock signal. The switching circuit is configured to periodically conduct the negative terminal to one of the first impedance node and the second impedance node, and periodically conduct the positive terminal to the other one of the first impedance node and the second impedance node.
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