公开(公告)号：US11128304B1

公开(公告)日：2021-09-21

申请号：US16879768

申请日：2020-05-21

Applicant: Novatek Microelectronics Corp.

Inventor： Yun-Sheng Yao ,  Shen-Iuan Liu ,  Yen-Long Lee ,  Peng-Yu Chen ,  Chih-Hao Huang ,  Yao-Hung Kuo

IPC: H03L7/08 ,  H04L7/033 ,  G06F1/12

Abstract: A clock and data recovery device and a jitter tolerance enhancement method thereof are provided. The clock and data recovery device includes a clock and data recovery circuit and a jitter tolerance enhancement circuit. A data input terminal of the clock and data recovery circuit is suitable for receiving a data signal. The clock and data recovery circuit recovers the data signal to a clock. The jitter tolerance enhancement circuit is coupled to the data input terminal of the clock and data recovery circuit to receive the data signal. The jitter tolerance enhancement circuit detects a correlation between the data signal and the clock and correspondingly adjusts a loop gain of the clock and data recovery circuit according to the correlation.