公开(公告)号：US20250138884A1

公开(公告)日：2025-05-01

申请号：US19006732

申请日：2024-12-31

Applicant: NVIDIA Corporation

Inventor： Sharan Ashwathnarayan ,  Debalina Bhattacharjee ,  Ashok Kelur ,  Alok Parikh ,  Yogesh Kini ,  Amit Rao ,  Aingarathasan Paramakuru ,  Kathleen E. Danielson ,  Daniel Jonathan Hettena ,  Vladislav Buzov

IPC: G06F9/50 ,  G06F9/48 ,  G06F9/52

Abstract: Apparatus, systems, and techniques to share memory. In at least one embodiment, a processor comprises one or more circuits to allocate memory to at least two heterogeneous processing cores in response to performing one or more instructions associated with one or more application programming interfaces based, at least in part, on one or more attributes associated with the at least two heterogeneous processing cores.

公开(公告)号：US20190266695A1

公开(公告)日：2019-08-29

申请号：US16408173

申请日：2019-05-09

Applicant: Nvidia Corporation

Inventor： Amit Rao ,  Ashish Srivastava ,  Yogesh Kini

IPC: G06T1/20 ,  G06F9/50 ,  G06F12/109 ,  G06T1/60

Abstract: The present invention facilitates efficient and effective utilization of unified virtual addresses across multiple components. In one embodiment, the presented new approach or solution uses Operating System (OS) allocation on the central processing unit (CPU) combined with graphics processing unit (GPU) driver mappings to provide a unified virtual address (VA) across both GPU and CPU. The new approach helps ensure that a GPU VA pointer does not collide with a CPU pointer provided by OS CPU allocation (e.g., like one returned by “malloc” C runtime API, etc.).

公开(公告)号：US10319060B2

公开(公告)日：2019-06-11

申请号：US14601223

申请日：2015-01-20

Applicant: Nvidia Corporation

Inventor： Amit Rao ,  Ashish Srivastava ,  Yogesh Kini

IPC: G06F13/14 ,  G06T1/20 ,  G06F12/109 ,  G06T1/60 ,  G06F9/50

Abstract: The present invention facilitates efficient and effective utilization of unified virtual addresses across multiple components. In one embodiment, the presented new approach or solution uses Operating System (OS) allocation on the central processing unit (CPU) combined with graphics processing unit (GPU) driver mappings to provide a unified virtual address (VA) across both GPU and CPU. The new approach helps ensure that a GPU VA pointer does not collide with a CPU pointer provided by OS CPU allocation (e.g., like one returned by “malloc” C runtime API, etc.).

公开(公告)号：US11893653B2

公开(公告)日：2024-02-06

申请号：US16408173

申请日：2019-05-09

Applicant: Nvidia Corporation

Inventor： Amit Rao ,  Ashish Srivastava ,  Yogesh Kini

IPC: G06F13/14 ,  G06T1/20 ,  G06F9/50 ,  G06F12/109 ,  G06T1/60

CPC classification number: G06T1/20 ,  G06F9/5016 ,  G06F12/109 ,  G06T1/60

Abstract: The present invention facilitates efficient and effective utilization of unified virtual addresses across multiple components. In one embodiment, the presented new approach or solution uses Operating System (OS) allocation on the central processing unit (CPU) combined with graphics processing unit (GPU) driver mappings to provide a unified virtual address (VA) across both GPU and CPU. The new approach helps ensure that a GPU VA pointer does not collide with a CPU pointer provided by OS CPU allocation (e.g., like one returned by “malloc” C runtime API, etc.).