公开(公告)号：US20250156314A1

公开(公告)日：2025-05-15

申请号：US18507659

申请日：2023-11-13

Applicant: Nvidia Corporation

Inventor： Akhil Langer ,  Sreeram Potluri ,  James Dinan

IPC: G06F12/02 ,  G06F9/50 ,  G06F12/1027

Abstract: Systems and methods herein are for at least one circuit to perform at least one process of different processes that may be associated with one or more applications, where the process may use one part of a virtual memory based on different requests by the different processes, where the virtual memory may include parts of equal allocations based on a maximum of different memory sizes in specifications associated with the different processes, where the one part of the virtual memory may be in a mapping with respect to one part of a physical memory of different allocated sizes, and where a translation for the mapping can occur using a start address and the maximum of the different memory sizes.

公开(公告)号：US20240168799A1

公开(公告)日：2024-05-23

申请号：US17991657

申请日：2022-11-21

Applicant: NVIDIA Corporation

Inventor： David Fontaine ,  Houston Thompson Hoffman ,  Arslan Zulfiqar ,  Stephen Jones ,  James Dinan ,  Jiri Johannes Kraus

IPC: G06F9/48 ,  G06F8/41

CPC classification number: G06F9/4881 ,  G06F8/433

Abstract: Apparatuses, systems, and techniques to modify graphs. In at least one embodiment, a processor comprises one or more circuits to modify an execution order of at least one graph portion.

公开(公告)号：US11677839B2

公开(公告)日：2023-06-13

申请号：US17351002

申请日：2021-06-17

Applicant: NVIDIA Corporation

Inventor： James Dinan ,  Akhil Langer ,  Sreeram Potluri

IPC: H04L67/141 ,  H04L67/104 ,  H04L67/12

CPC classification number: H04L67/141 ,  H04L67/104 ,  H04L67/12

Abstract: Apparatuses, systems, and techniques are directed to automatic coalescing of GPU-initiated network communications. In one method, a communication engine receives, from a shared memory application executing on a first graphics processing unit (GPU), a first communication request assigned to or having a second GPU as a destination to be processed. The communication engine determines that the first communication request satisfies a coalescing criterion and stores the first communication request in association with a group of requests that have a common property. The communication engine coalesces the group of requests into a coalesced request and transports the coalesced request to the second GPU over a network.

公开(公告)号：US20250077444A1

公开(公告)日：2025-03-06

申请号：US18627981

申请日：2024-04-05

Applicant: NVIDIA Corporation

Inventor： Pak Markthub ,  James Dinan

IPC: G06F13/16 ,  G06F9/50

Abstract: A system is described having an input/output (IO) device and a processing unit coupled with the IO device. The processing unit is enabled to elect a thread from among a plurality of threads to atomically update a queue head pointer, uses the queue head pointer to reserve space in a plurality of memory registers for work queue elements belonging to the plurality of threads, and submit the work queue elements to the IO device.

公开(公告)号：US20220407920A1

公开(公告)日：2022-12-22

申请号：US17351002

申请日：2021-06-17

Applicant: NVIDIA Corporation

Inventor： James Dinan ,  Akhil Langer ,  Sreeram Potluri

IPC: H04L29/08

Abstract: Apparatuses, systems, and techniques are directed to automatic coalescing of GPU-initiated network communications. In one method, a communication engine receives, from a shared memory application executing on a first graphics processing unit (GPU), a first communication request assigned to or having a second GPU as a destination to be processed. The communication engine determines that the first communication request satisfies a coalescing criterion and stores the first communication request in association with a group of requests that have a common property. The communication engine coalesces the group of requests into a coalesced request and transports the coalesced request to the second GPU over a network.