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    BATCH SCHEDULING FOR EFFICIENT EXECUTION OF MULTIPLE MACHINE LEARNING MODELS
    1.
    发明申请
    BATCH SCHEDULING FOR EFFICIENT EXECUTION OF MULTIPLE MACHINE LEARNING MODELS 有权

    公开(公告)号：US20250045622A1

    公开(公告)日：2025-02-06

    申请号：US18230311

    申请日：2023-08-04

    Applicant: NVIDIA Corporation

    Inventor： Shekhar Dwivedi ,  Rahul Choudhury

    IPC: G06N20/00

    Abstract: Apparatuses, systems, and techniques for efficient profiling, scheduling, and batch execution of multiple machine learning models (MLMs). Efficient batch execution includes obtaining execution metrics characterizing expected utilization of computational resources by the MLMs, and generating at least one batch queue having one or more MLM batches of MLMs with a combined expected utilization not exceeding a threshold utilization, and initiating parallel execution of the MLMs using the generated MLM batches.

    Optimizing grid-based compute graphs
    2.
    发明授权
    Optimizing grid-based compute graphs 有权

    公开(公告)号：US12217331B2

    公开(公告)日：2025-02-04

    申请号：US17955380

    申请日：2022-09-28

    Applicant: NVIDIA Corporation

    Inventor： Shekhar Dwivedi

    IPC: G06T11/00 ,  G06T1/20 ,  G06T1/60

    Abstract: Disclosed are apparatuses, systems, and techniques that enable compressed grid-based graph representations for efficient implementations of graph-mapped computing applications. The techniques include but are not limited to selecting a reference grid having a plurality of blocks, assigning nodes of the graph to blocks of the grid, and generating a graph representation that maps directions, relative to the reference grid, of nodal connections of the graph.

    Reconstructing image data
    3.
    发明授权
    Reconstructing image data 有权

    公开(公告)号：US11037338B2

    公开(公告)日：2021-06-15

    申请号：US16376449

    申请日：2019-04-05

    Applicant: Nvidia Corporation

    Inventor： Shekhar Dwivedi

    IPC: G06T11/00 ,  G16H30/40 ,  G06T7/00 ,  G06N20/00

    Abstract: This disclosure introduces an approach that includes techniques for determining an optimal weighted execution sequence of available reconstruction algorithms using a multi-processor unit. The introduced approach includes executing a series of optimal weighted execution sequence candidates on a representative slice of the image data and comparing their results to select one of the candidates as the optimal weighted execution sequence.

    METHOD AND APPARATUS FOR IMPROVING PROCESSOR RESOURCE UTILIZATION DURING PROGRAM EXECUTION
    5.
    发明申请
    METHOD AND APPARATUS FOR IMPROVING PROCESSOR RESOURCE UTILIZATION DURING PROGRAM EXECUTION 有权

    公开(公告)号：US20220261287A1

    公开(公告)日：2022-08-18

    申请号：US17174951

    申请日：2021-02-12

    Applicant: NVIDIA Corporation

    Inventor： Shekhar Dwivedi ,  Andreas Heumann

    IPC: G06F9/50 ,  G16H30/40 ,  G06N3/04 ,  G06F9/38 ,  G06T1/20

    Abstract: Systems and methods for improving the degree to which programs utilize processor resources during execution. A number of different versions of a program are received, as is a set of performance metrics describing desired performance of the program versions. The programs are then analyzed to determine the amount of processor resources used on a particular processor when the programs are executed to meet the performance metrics. At runtime, a program version that meets its performance metrics without exceeding the available processor resources is selected for execution by the processor. Program versions may be versions written to utilize processors in differing manner, such as by adjusting the numerical precision at which operations are performed or stored. If no program version meets its performance metrics without exceeding the available processor resources, the performance metrics may be reduced and program selection may be based on these reduced performance metrics.

    OPTIMIZING GRID-BASED COMPUTE GRAPHS
    8.
    发明公开
    OPTIMIZING GRID-BASED COMPUTE GRAPHS 审中-公开

    公开(公告)号：US20240104790A1

    公开(公告)日：2024-03-28

    申请号：US17955380

    申请日：2022-09-28

    Applicant: NVIDIA Corporation

    Inventor： Shekhar Dwivedi

    IPC: G06T11/00 ,  G06T1/20 ,  G06T1/60

    CPC classification number: G06T11/00 ,  G06T1/20 ,  G06T1/60

    Abstract: Disclosed are apparatuses, systems, and techniques that enable compressed grid-based graph representations for efficient implementations of graph-mapped computing applications. The techniques include but are not limited to selecting a reference grid having a plurality of blocks, assigning nodes of the graph to blocks of the grid, and generating a graph representation that maps directions, relative to the reference grid, of nodal connections of the graph.

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