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公开(公告)号：US20190188846A1
公开(公告)日：2019-06-20
申请号：US16162456
申请日：2018-10-17
Applicant: OMRON Corporation
Inventor： Toshinori TAMAI
Abstract: An information processing apparatus may include: a storage unit configured to store a plurality of classifiers that identify an object, the classifiers having different characteristics; a measurement unit configured to measure identification accuracy and execution time of each of the plurality of classifiers for a specific object; an output unit configured to output the identification accuracy and the execution time of each of the plurality of classifiers; a selection unit configured to select, from the classifiers whose identification accuracy measured by the measurement unit meets a first condition, a classifier whose execution time meets a second condition; and a setting unit configured to perform setting to cause the selected classifier to operate on an identification apparatus.
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公开(公告)号：US20230099487A1
公开(公告)日：2023-03-30
申请号：US17798302
申请日：2021-01-18
Applicant: OMRON Corporation
Inventor： Toshinori TAMAI
Abstract: A communication control device stores reception data received from a network in any one of a plurality of reception queues to which different priorities have been given in advance to transfer the reception data to a main memory. The communication control device includes a reference table and a selection unit. In the reference table, at least one of a source address, a destination address, and an Ethernet frame type of the reception data to be stored is defined for at least one of the plurality of reception queues. The selection unit selects a reception queue in which the reception data is to be stored with reference to the reference table using at least one of the source address, the destination address, and the Ethernet frame type of the reception data.
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公开(公告)号：US20180262679A1
公开(公告)日：2018-09-13
申请号：US15844636
申请日：2017-12-18
Applicant: OMRON Corporation
Inventor： Kosuke WATANABE , Toshinori TAMAI
CPC classification number: H04N5/23225 , G06F12/06 , G06F2212/1041 , G06F2212/172 , H04N1/00344 , H04N5/23216
Abstract: An image processing system can specify storage locations of necessary functions even when a user-set process flow has been updated. The image processing system includes a setting device and an image processing device. The image processing device includes a storage device and a field programmable gate array (FPGA). The setting device includes a generation part that generates storage location information defining a storage location in the storage part for each of image processing programs to be selected, which have been selected from a library, and a transmission part that transmits the image processing programs to be selected, a process flow defining an execution order of the image processing programs, and the storage location information to the image processing device. The image processing device includes a rewriting part that writes a received image processing program to a storage location of the storage device defined in the storage location information.
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公开(公告)号：US20220214986A1
公开(公告)日：2022-07-07
申请号：US17605243
申请日：2020-03-02
Applicant: OMRON Corporation
Inventor： Toshinori TAMAI
IPC: G06F13/372 , G06F13/42 , G06F13/28 , G06F13/16
Abstract: Provided is a unit comprising a DMAC which, on the basis of a signal outputted from a time counting part which operates in synchronization with a time counting part of a PLC, does not communicate a memory via a serial bus in a control cycle of a CPU during at least a first period overlapping a period in which the CPU communicates with the memory, and communicates with the memory via the serial bus during a second period which begins after the first period.
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公开(公告)号：US20190188845A1
公开(公告)日：2019-06-20
申请号：US16162451
申请日：2018-10-17
Applicant: OMRON Corporation
Inventor： Toshinori TAMAI
CPC classification number: G06T7/0008 , G06K9/00624 , G06K9/3241 , G06K9/46 , G06K9/6227 , G06K2209/19 , G06T7/0004 , G06T2207/20081 , G06T2207/20084 , G06T2207/30164
Abstract: An identifying apparatus may include: an imaging unit configured to store multiple identifiers that are trained to identify, from images of objects, the presence or absence of a detection target included in the objects, the identifiers being stored in association with attributes of the objects, and to capture an image of a predetermined object; a specifying unit configured to specify an attribute of the predetermined object; a selecting unit configured to select, from the multiple identifiers, a first identifier stored in association with the specified attribute; an input unit configured to input the image of the predetermined object to the first identifier; and an output unit configured to output the presence or absence of the detection target included in the predetermined object, which is output from the first identifier.
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Patent Agency Ranking
公开(公告)号：US20180224825A1
公开(公告)日：2018-08-09
申请号：US15820451
申请日：2017-11-22
Applicant: OMRON Corporation
Inventor： Toshinori TAMAI
IPC: G05B19/402 , G06T7/73 , G06T7/00 , G06T1/20
Abstract: An image processing system which can execute various image processings in an operation process of a robot is provided. The image processing system includes: a robot for performing a predetermined operation on a workpiece; a photographing unit for photographing the workpiece; an acquisition unit for acquiring a position of the robot; a field programmable gate array (FPGA) for reconfiguring an internal circuit configuration; a storage unit for storing area information where circuit information for implementing predetermined image processing on an image obtained from the photographing unit as information for defining the circuit configuration of the FPGA is defined for each operation area of the robot; and a reconfiguration unit for reconfiguring the circuit configuration of the FPGA with the circuit information associated with the operation area based on that a position of the robot sequentially acquired by the acquisition unit belongs to one operation area defined in the area information.
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7.发明申请公开(公告)号：US20180218491A1
公开(公告)日：2018-08-02
申请号：US15786717
申请日：2017-10-18
Applicant: OMRON Corporation
Inventor： Toshinori TAMAI
IPC: G06T7/00 , G06F3/0484 , G06T1/20
CPC classification number: G06T7/0004 , G06F3/04817 , G06F3/04842 , G06F3/04845 , G06F8/34 , G06K9/00986 , G06K9/00993 , G06T1/20
Abstract: An image processing system includes: a central processing unit (CPU); a field programmable gate array (FPGA); a storage in which a library including plural pieces of image processing executed by the CPU or the FPGA is stored; an operation unit configured to receive an operation to select at least one piece of image processing from the library and an operation to designate execution order with respect to each piece of selection target image processing selected through the selection operation; an estimator configured to estimate an execution time in each combination of execution subjects with respect to each piece of selection target image processing when the CPU or the FPGA processes each piece of selection target image processing according to the execution order; a specification unit configured to specify the combination of the execution subjects having the relatively short execution time; and a display configured to display the specified.
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8.发明申请公开(公告)号：US20170300774A1
公开(公告)日：2017-10-19
申请号：US15450634
申请日：2017-03-06
Applicant: OMRON CORPORATION
Inventor： Toshinori TAMAI , Taku OYA
IPC: G06K9/46
CPC classification number: G06K9/4614 , G06F15/7878 , H04N1/0083 , H04N1/00962
Abstract: An image processing device configured to process image data obtained externally, the image processing device including a preprocessing circuit configured to carry out preprocessing during image processing; and a circuit configuration controller configured to carry out partial reconfiguration of the preprocessing circuit; the preprocessing circuit including: a plurality of arithmetic converter circuits configured to perform arithmetic computations on image data to convert the image data; and a timing control circuit provided between each one in the plurality of arithmetic converter circuits connected in order of processing, the timing control circuit configured to secure the reliable exchange of data; and the circuit configuration controller partially reconfiguring at least one arithmetic converter circuit in the plurality of arithmetic converter circuits while not partially reconfiguring the timing control circuit.
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公开(公告)号：US20220206967A1
公开(公告)日：2022-06-30
申请号：US17605555
申请日：2020-03-02
Applicant: OMRON Corporation
Inventor： Toshinori TAMAI
Abstract: Provided is a unit that causes transmission of smallest payload data to a communication interface to be in standby during a time period from a time, at which it is determined that a transmission time of smallest payload data exceeds a reference value during a control cycle, to a time at which the communication interface transmits the smallest payload data to be transmitted next after the most recent smallest payload data transmitted at the time.
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公开(公告)号：US20190188543A1
公开(公告)日：2019-06-20
申请号：US16127278
申请日：2018-09-11
Applicant: OMRON Corporation
Inventor： Toshinori TAMAI
CPC classification number: G06K9/66 , G06K9/2027 , G06K9/3241 , G06K9/6234 , G06K9/6253 , G06K9/6256 , G06K9/6262 , G06T2207/20081
Abstract: A detection system includes an image processing apparatus configured to discriminate whether or not there is a detection target contained in an object, using a discriminator, and an information processing apparatus configured to provide the discriminator to the image processing apparatus. The information processing apparatus includes an evaluation unit configured to evaluate, for each attribute, discrimination precisions of the discriminator before and after the additional training, using evaluation data associated with each of a plurality of attributes of an object, when the discriminator is additionally trained using the training data, and an output unit configured to output the discrimination precisions for each attribute.
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