公开(公告)号：US20140310555A1

公开(公告)日：2014-10-16

申请号：US13861917

申请日：2013-04-12

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： Jurgen M. Schulz ,  Vishak Chandrasekhar ,  Wayne F. Seltzer ,  Brian J. McGee

IPC: G06F11/20

CPC classification number: G06F11/2002 ,  G06F11/0724 ,  G06F11/0793 ,  G06F11/2007 ,  H04L43/0823 ,  H04L49/557

Abstract: The disclosed embodiments disclose techniques for performing physical domain error isolation and recovery in a multi-domain system, where the multi-domain system includes two or more processor chips and one or more switch chips that provide connectivity and cache-coherency support for the processor chips, and the processor chips are divided into two or more distinct domains. During operation, one of the switch chips determines a fault in the multi-domain system. The switch chip determines an originating domain that is associated with the fault, and then signals the fault and an identifier for the originating domain to its internal units, some of which perform clearing operations that clear out all traffic for the originating domain without affecting the other domains of the multi-domain system.

Abstract translation: 所公开的实施例公开了在多域系统中执行物理域错误隔离和恢复的技术，其中多域系统包括两个或多个处理器芯片和为处理器芯片提供连接性和高速缓存一致性支持的一个或多个交换芯片 ，并且处理器芯片被分成两个或更多个不同的域。 在运行期间，其中一个开关芯片决定了多域系统中的故障。 交换芯片确定与故障相关联的始发域，然后将故障信号和起始域的标识符发送到其内部单元，其中一些执行清除操作，清除始发域的所有业务，而不影响其他 多域系统的域。

公开(公告)号：US09256500B2

公开(公告)日：2016-02-09

申请号：US13861917

申请日：2013-04-12

Applicant: Oracle International Corporation

Inventor： Jurgen M. Schulz ,  Vishak Chandrasekhar ,  Wayne F. Seltzer ,  Brian J. McGee

IPC: G06F11/00 ,  G06F11/20 ,  H04L12/26 ,  H04L12/939

CPC classification number: G06F11/2002 ,  G06F11/0724 ,  G06F11/0793 ,  G06F11/2007 ,  H04L43/0823 ,  H04L49/557

Abstract: The disclosed embodiments disclose techniques for performing physical domain error isolation and recovery in a multi-domain system, where the multi-domain system includes two or more processor chips and one or more switch chips that provide connectivity and cache-coherency support for the processor chips, and the processor chips are divided into two or more distinct domains. During operation, one of the switch chips determines a fault in the multi-domain system. The switch chip determines an originating domain that is associated with the fault, and then signals the fault and an identifier for the originating domain to its internal units, some of which perform clearing operations that clear out all traffic for the originating domain without affecting the other domains of the multi-domain system.

Abstract translation: 所公开的实施例公开了在多域系统中执行物理域错误隔离和恢复的技术，其中多域系统包括两个或多个处理器芯片和为处理器芯片提供连接性和高速缓存一致性支持的一个或多个交换芯片 ，并且处理器芯片被分成两个或更多个不同的域。 在运行期间，其中一个开关芯片决定了多域系统中的故障。 交换芯片确定与故障相关联的始发域，然后将故障信号和起始域的标识符发送到其内部单元，其中一些执行清除操作，清除始发域的所有业务，而不影响其他 多域系统的域。