公开(公告)号：US10854787B2

公开(公告)日：2020-12-01

申请号：US16052511

申请日：2018-08-01

申请人： OSRAM Opto Semiconductors GmbH

发明人： Teik Yee Wong ,  Chee Weng Soong ,  Rajah Prakash ,  Christian Betthausen ,  Chee-Eng Ooi ,  Ismail Ithnain ,  Choo Kean Lim ,  Weng Heng Chan

IPC分类号： H01L33/48 ,  H01L33/20 ,  H01L33/46 ,  H01L33/54 ,  H01L33/56 ,  H01L33/60 ,  H01L25/075

摘要： A component having a boundary element is disclosed. In an embodiment a component comprises a semiconductor chip, a housing and a reflective layer, wherein the housing has a shaped body and a base body, the shaped body laterally enclosing the base body at least in places and being different from the reflective layer. In a plan view, the base body has a free area which is uncovered by the shaped body. The free area or a bottom surface of a cavity comprises a mounting surface for the semiconductor chip, wherein the semiconductor chip is arranged on the mounting surface. The bottom surface or the free area is partially covered by the reflective layer, wherein the mounting surface is enclosed at least in regions by a boundary element which adjoins the reflective layer and is configured to prevent the semiconductor chip from being covered by the reflective layer.

公开(公告)号：US20190044033A1

公开(公告)日：2019-02-07

申请号：US16052511

申请日：2018-08-01

申请人： OSRAM Opto Semiconductors GmbH

发明人： Teik Yee Wong ,  Chee Weng Soong ,  Rajah Prakash ,  Christian Betthausen ,  Chee-Eng Ooi ,  Ismail Ithnain ,  Choo Kean Lim ,  Weng Heng Chan

IPC分类号： H01L33/48 ,  H01L33/56 ,  H01L33/60 ,  H01L33/46 ,  H01L33/20 ,  H01L33/54

摘要： A component having a boundary element is disclosed. In an embodiment a component comprises a semiconductor chip, a housing and a reflective layer, wherein the housing has a shaped body and a base body, the shaped body laterally enclosing the base body at least in places and being different from the reflective layer. In a plan view, the base body has a free area which is uncovered by the shaped body. The free area or a bottom surface of a cavity comprises a mounting surface for the semiconductor chip, wherein the semiconductor chip is arranged on the mounting surface. The bottom surface or the free area is partially covered by the reflective layer, wherein the mounting surface is enclosed at least in regions by a boundary element which adjoins the reflective layer and is configured to prevent the semiconductor chip from being covered by the reflective layer.