公开(公告)号：US20220416133A1

公开(公告)日：2022-12-29

申请号：US17757579

申请日：2020-12-10

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Christian Betthausen ,  Olivier Leray ,  Muyuan Li ,  Benjamin Gruber ,  Michael Steyer ,  Alexander Linkov ,  Stefan Handl

IPC: H01L33/58 ,  H01L33/48

Abstract: In an embodiment a method for operating an optoelectronic semiconductor component includes providing the optoelectronic semiconductor component having an optoelectronic semiconductor chip and a casing comprising a matrix material, wherein the semiconductor chip is embedded into the casing, and wherein optically inactive particles have been introduced as crack nuclei into the matrix material of the casing, and operating the optoelectronic semiconductor component such that cavities form entirely within the casing for at least some of the crack nuclei.

公开(公告)号：US20180097154A1

公开(公告)日：2018-04-05

申请号：US15719649

申请日：2017-09-29

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Jan Marfeld ,  Christian Betthausen ,  Thomas Schlereth ,  Ivar Tangring

IPC: H01L33/50 ,  H01L27/15

CPC classification number: H01L33/505 ,  F21K9/64 ,  F21V3/08 ,  F21Y2103/10 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/504 ,  H01L2933/0041

Abstract: In various embodiments, a light emitting component is provided. The light emitting component includes a plurality of light emitting semiconductor chips. The semiconductor chips are arranged on at least one carrier. The semiconductor chips are electrically contacted. The light emitting component further includes a converter. The converter is configured to convert light in a first wavelength range, said light being emitted by at least one portion of the light emitting semiconductor chips, at least partly into light in a second wavelength range. The converter is formed separately from the at least one carrier.

公开(公告)号：US10854787B2

公开(公告)日：2020-12-01

申请号：US16052511

申请日：2018-08-01

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Teik Yee Wong ,  Chee Weng Soong ,  Rajah Prakash ,  Christian Betthausen ,  Chee-Eng Ooi ,  Ismail Ithnain ,  Choo Kean Lim ,  Weng Heng Chan

IPC: H01L33/48 ,  H01L33/20 ,  H01L33/46 ,  H01L33/54 ,  H01L33/56 ,  H01L33/60 ,  H01L25/075

Abstract: A component having a boundary element is disclosed. In an embodiment a component comprises a semiconductor chip, a housing and a reflective layer, wherein the housing has a shaped body and a base body, the shaped body laterally enclosing the base body at least in places and being different from the reflective layer. In a plan view, the base body has a free area which is uncovered by the shaped body. The free area or a bottom surface of a cavity comprises a mounting surface for the semiconductor chip, wherein the semiconductor chip is arranged on the mounting surface. The bottom surface or the free area is partially covered by the reflective layer, wherein the mounting surface is enclosed at least in regions by a boundary element which adjoins the reflective layer and is configured to prevent the semiconductor chip from being covered by the reflective layer.

公开(公告)号：US20190044033A1

公开(公告)日：2019-02-07

申请号：US16052511

申请日：2018-08-01

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Teik Yee Wong ,  Chee Weng Soong ,  Rajah Prakash ,  Christian Betthausen ,  Chee-Eng Ooi ,  Ismail Ithnain ,  Choo Kean Lim ,  Weng Heng Chan

IPC: H01L33/48 ,  H01L33/56 ,  H01L33/60 ,  H01L33/46 ,  H01L33/20 ,  H01L33/54

Abstract: A component having a boundary element is disclosed. In an embodiment a component comprises a semiconductor chip, a housing and a reflective layer, wherein the housing has a shaped body and a base body, the shaped body laterally enclosing the base body at least in places and being different from the reflective layer. In a plan view, the base body has a free area which is uncovered by the shaped body. The free area or a bottom surface of a cavity comprises a mounting surface for the semiconductor chip, wherein the semiconductor chip is arranged on the mounting surface. The bottom surface or the free area is partially covered by the reflective layer, wherein the mounting surface is enclosed at least in regions by a boundary element which adjoins the reflective layer and is configured to prevent the semiconductor chip from being covered by the reflective layer.