公开(公告)号：US10483446B2

公开(公告)日：2019-11-19

申请号：US15750316

申请日：2015-08-06

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Kok Eng Ng ,  Wui Chai Chew ,  Choo Kean Lim ,  Mardiana Khalid

IPC: H01L21/48 ,  H01L33/64 ,  H01L23/373 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/075 ,  H01L33/62 ,  H01L33/50

Abstract: An electronic device includes a carrier and a semiconductor chip, wherein the carrier includes a first dielectric layer and a second dielectric layer, a thermal conductivity of the first dielectric layer exceeds a thermal conductivity of the second dielectric layer, the second dielectric layer is arranged on the first dielectric layer and partially covers the first dielectric layer, the semiconductor chip is arranged on the carrier in a mounting area in which the first dielectric layer is not covered by the second dielectric layer, and the carrier includes a solder terminal for electrical contacting arranged on the second dielectric layer.

公开(公告)号：US20180226555A1

公开(公告)日：2018-08-09

申请号：US15750316

申请日：2015-08-06

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Kok Eng Ng ,  Wui Chai Chew ,  Choo Kean Lim ,  Mardiana Khalid

IPC: H01L33/64 ,  H01L33/62 ,  H01L23/498 ,  H01L25/075 ,  H01L21/48 ,  H01L23/00 ,  H01L23/373 ,  H01L23/538

Abstract: An electronic device includes a carrier and a semiconductor chip, wherein the carrier includes a first dielectric layer and a second dielectric layer, a thermal conductivity of the first dielectric layer exceeds a thermal conductivity of the second dielectric layer, the second dielectric layer is arranged on the first dielectric layer and partially covers the first dielectric layer, the semiconductor chip is arranged on the carrier in a mounting area in which the first dielectric layer is not covered by the second dielectric layer, and the carrier includes a solder terminal for electrical contacting arranged on the second dielectric layer.