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公开(公告)号:US12165030B2
公开(公告)日:2024-12-10
申请号:US17351434
申请日:2021-06-18
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Mayan Moudgill , John Glossner
Abstract: A system and method include an accelerator circuit comprising an input circuit block, a filter circuit block, a post-processing circuit block, and an output circuit block and a processor to initialize the accelerator circuit, determining tasks of a neural network application to be performed by at least one of the input circuit block, the filter circuit block, the post-processing circuit block, or the output circuit block, assign each of the tasks to a corresponding one of the input circuit block, the filter circuit block, the post-processing circuit block, or the output circuit block, instruct the accelerator circuit to perform the tasks, and execute the neural network application based on results received from the accelerator circuit completing performance of the tasks.
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公开(公告)号:US20230358370A1
公开(公告)日:2023-11-09
申请号:US17790799
申请日:2020-12-29
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Sabin Daniel Iancu , John Glossner , Samantha Murphy , Kristin Koehn
CPC classification number: F21K9/60 , H05B45/28 , F21Y2115/10
Abstract: A light-emitting diode (LED) lighting device includes a white light source characterized by a general color rendering index (CRI) value and a first color-specific CRI value, and one or more LED elements of a color light within a wavelength band, wherein a combined light source comprising the white light source and the one or more LED elements is characterized by the general CRI value and a second color-specific CRI value, and the second color-specific CRI value is greater than the first color-specific CRI value.
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公开(公告)号:US11144815B2
公开(公告)日:2021-10-12
申请号:US16769171
申请日:2018-12-03
Applicant: Optimum Semiconductor Technologies Inc.
Inventor: Mayan Moudgill , John Glossner
Abstract: A system includes a memory, a processor, and an accelerator circuit. The accelerator circuit includes an internal memory, an input circuit block, a filter circuit block, a post-processing circuit block, and an output circuit block to concurrently perform tasks of a neural network application assigned to the accelerator circuit by the processor.
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