公开(公告)号：US12050910B2

公开(公告)日：2024-07-30

申请号：US17427832

申请日：2020-02-20

Applicant: Optimum Semiconductor Technologies Inc.

Inventor： Mayan Moudgill ,  Pablo Balzola ,  Murugappan Senthivelan ,  Vaidyanathan Ramdurai ,  Sitij Agrawal

IPC: G06F9/30 ,  G06F5/01 ,  G06F7/544 ,  G06F7/548 ,  G06F17/17

CPC classification number: G06F9/3001 ,  G06F7/5446 ,  G06F7/548 ,  G06F9/3013 ,  G06F17/17 ,  G06F5/01

Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store a trigonometric calculation instruction for evaluating a trigonometric function, and data registers comprising a first data register to store a floating-point input value associated with the trigonometric calculation instruction. The accelerator circuit further includes a determination circuit to identify the trigonometric calculation function and the floating-point input value associated with the trigonometric calculation instruction and determine whether the floating-point input value is in a small value range, and an approximation circuit to responsive to determining that the floating-point input value is in the small value, receive the floating-point input value and calculate an approximation of the trigonometric function with respect to the input value.

公开(公告)号：US11928465B2

公开(公告)日：2024-03-12

申请号：US17427843

申请日：2020-02-20

Applicant: Optimum Semiconductor Technologies Inc.

Inventor： Mayan Moudgill ,  Pablo Balzola ,  Murugappan Senthivelan ,  Vaidyanathan Ramdurai ,  Sitij Agrawal

IPC: G06F9/30 ,  G06F7/544 ,  G06F7/548 ,  G06F17/17 ,  G06F5/01

CPC classification number: G06F9/3001 ,  G06F7/5446 ,  G06F7/548 ,  G06F9/3013 ,  G06F17/17 ,  G06F5/01

Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store an instruction for evaluating an elementary function, and data registers comprising a first data register to store an input value. The accelerator circuit further includes a successive cumulative rotation circuit comprising a reconfigurable inner stage to perform a successive cumulative rotation recurrence, and a determination circuit to determine a type of the elementary function based on the instruction, and responsive to determining that the input value is a fixed-point number, configure the reconfigurable inner stage to a configuration for evaluating the type of the elementary function, wherein the successive cumulative rotation circuit is to calculate an evaluation of the elementary function using the reconfigurable inner stage performing the successive cumulative rotation recurrence.