公开(公告)号：US20180248540A1

公开(公告)日：2018-08-30

申请号：US15965007

申请日：2018-04-27

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Takuya ISHII ,  Daijiro ARISAWA ,  Masanori ITO ,  Takao HASHIMOTO ,  Takeshi AZUMA ,  Miwa ISHITSUBO ,  Kazuhiro MURATA

IPC: H03K3/013 ,  H03K17/16 ,  H05K1/18

CPC classification number: H03K3/013 ,  H02M1/08 ,  H02M2001/348 ,  H03K17/161 ,  H03K17/163 ,  H05K1/0243 ,  H05K1/181 ,  H05K2201/10166 ,  H05K2201/10545

Abstract: A switching circuit includes main switching a device and a drive circuit. The main switching device has a gate terminal, a drain terminal, and a first source terminal through which a main current flows, and a second source terminal for gate drive connected to drive circuit. The drive circuit has a bias capacitor having a negative electrode terminal connected to the second source terminal, a first series circuit formed between a positive electrode terminal and the gate terminal by connecting a high-side switch, a resistor, and a capacitor in series, and a second series circuit formed between the gate terminal and the second source terminal by connecting the capacitor, a resistor and a low-side switch in series. The drive circuit adjusts each of gate charge and discharge currents, and further damps the oscillation of the waveform of gate current/voltage.