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公开(公告)号:US20190326810A1
公开(公告)日:2019-10-24
申请号:US16455615
申请日:2019-06-27
Inventor: Takao HASHIMOTO , Takuya ISHII
Abstract: A power-factor correcting converter includes: a series circuit including a first higher-potential switch and a first lower-potential switch connected in series to each other; and another series circuit including a second higher-potential switch and a second lower-potential switch connected in series to each other. In a positive phase period of the input AC voltage, a control circuit turns off the second higher-potential switch, turns on the second lower-potential switch, and alternately turns on and off the first lower-potential switch as a master switch and the first higher-potential switch as a slave switch. In a negative phase period of the input AC voltage, the control circuit reverses the on/off operation and the master/slave relationship, and turns on and off only the master switch and turns off the slave switch when the absolute value of the input AC voltage is smaller than or equal to a predetermined value.
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公开(公告)号:US20190326829A1
公开(公告)日:2019-10-24
申请号:US16455623
申请日:2019-06-27
Inventor: Takao HASHIMOTO , Takuya ISHII
Abstract: An alternating current-direct current (AC-DC) converter includes: an input AC power supply that outputs an input AC voltage; a step-up converter that converts the input AC voltage into an output DC voltage to be outputted from an output capacitor; and an inrush current suppressing circuit. The inrush current suppressing circuit includes: an inrush current suppressing resistor provided on a path through which a current from the input AC power supply flows to charge the output capacitor and returns to the input AC power supply; a resistance short-circuiting switch that short-circuits the inrush current suppressing resistor; and a control circuit that generates a signal for turning off the resistance short-circuiting switch when an absolute value of the input AC voltage is higher than the output DC voltage.
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公开(公告)号:US20180248540A1
公开(公告)日:2018-08-30
申请号:US15965007
申请日:2018-04-27
Inventor: Takuya ISHII , Daijiro ARISAWA , Masanori ITO , Takao HASHIMOTO , Takeshi AZUMA , Miwa ISHITSUBO , Kazuhiro MURATA
CPC classification number: H03K3/013 , H02M1/08 , H02M2001/348 , H03K17/161 , H03K17/163 , H05K1/0243 , H05K1/181 , H05K2201/10166 , H05K2201/10545
Abstract: A switching circuit includes main switching a device and a drive circuit. The main switching device has a gate terminal, a drain terminal, and a first source terminal through which a main current flows, and a second source terminal for gate drive connected to drive circuit. The drive circuit has a bias capacitor having a negative electrode terminal connected to the second source terminal, a first series circuit formed between a positive electrode terminal and the gate terminal by connecting a high-side switch, a resistor, and a capacitor in series, and a second series circuit formed between the gate terminal and the second source terminal by connecting the capacitor, a resistor and a low-side switch in series. The drive circuit adjusts each of gate charge and discharge currents, and further damps the oscillation of the waveform of gate current/voltage.
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