公开(公告)号：US3582636A

公开(公告)日：1971-06-01

申请号：US3582636D

申请日：1968-12-24

Applicant: PHILIPS CORP

Inventor： BERTRAM UWE

IPC: G06F11/10 ,  G08C25/00

CPC classification number: G06F11/104

Abstract: A circuit for calculating and employing a check digit, having two module M counters, the first counter coupled directly to a weighted series of pulses, the second counter responsive to a carry from the first counter for counting double the number of input pulses applied to the first counter, completion of the series providing the M complement of the check digit in said second counter, and providing the check digit to the circuit resulting in nonzero condition in the second counter of the digit sequence is in error.

公开(公告)号：US3601626A

公开(公告)日：1971-08-24

申请号：US3601626D

申请日：1969-02-26

Applicant: PHILIPS CORP

Inventor： HOFFMANN HANS ,  WITTORF LUDWIG ,  NEUHAUS HANS-WILHELM ,  BERTRAM UWE

IPC: H03K19/08 ,  H03K19/082 ,  H03M7/00 ,  H03M7/08

CPC classification number: H03M7/08 ,  H03K19/08 ,  H03K19/082 ,  H03M7/00

Abstract: A digital logic element in which a single voltage supply provided current to an input circuit connected in series with a diode biased in the forward conduction region. Voltage for supplying part of a digital output circuit in the element is taken from the junction of the input circuit and the diodes.