SYSTEMS AND METHODS FOR VARIABLE-LENGTH ENCODING AND DECODING FOR ENHANCING COMPUTER SYSTEMS

    公开(公告)号:US20200084200A1

    公开(公告)日:2020-03-12

    申请号:US16680688

    申请日:2019-11-12

    申请人: Kara Partners LLC

    摘要: A method for variable length decoding, the method including: receiving, in a default word length mode, at least one first data word having a default first word length; combining the received at least one first data word as a first portion of data; receiving, after the at least one first data word, a transition word indicative of transitioning to a variable word length mode; receiving, after the transition word, a first word length word indicative of a second word length; receiving, after the first word length word, at least one second data word having the second word length; and combining the received at least one second data word as a second portion of the data.

    Technologies for Enhancing Computer Security

    公开(公告)号:US20190268327A1

    公开(公告)日:2019-08-29

    申请号:US16406321

    申请日:2019-05-08

    申请人: Kara Partners LLC

    IPC分类号: H04L29/06 H03M7/08 G06F21/31

    摘要: A system including: at least one processor; and at least one memory, having stored thereon computer program code that, when executed by the at least one processor, controls the at least one processor to: receive a first sequence of values; segment the first sequence of values into a first subsequence having a first length and a second subsequence having a second length; modify the first subsequence by inserting one or more values into the first subsequence to create a modified first subsequence of a third length; modify the second subsequence by one or more inserting values into the second subsequence to create a modified second subsequence of the third length; combine the modified first subsequence and the modified second subsequence to create a second sequence of values; and output the second sequence of values.

    Method and appartus for determining a precision of an intermediate
arithmetic for converting values between a first numeric format and a
second numeric format
    4.
    发明授权
    Method and appartus for determining a precision of an intermediate arithmetic for converting values between a first numeric format and a second numeric format 失效
    用于确定用于在第一数字格式和第二数字格式之间转换值的中间算术的精度的方法和装置

    公开(公告)号:US5652862A

    公开(公告)日:1997-07-29

    申请号:US523681

    申请日:1995-09-05

    申请人: Kenton L. Hanson

    发明人: Kenton L. Hanson

    IPC分类号: G06F7/48 H03M7/08 G06F7/38

    CPC分类号: G06F7/48 H03M7/08 G06F7/49957

    摘要: A method and apparatus for efficient allocation of temporary storage for performing accurate and correct numeric base conversions on a computer system is provided. Numeric base conversions are common because computers operate in binary whereas the values that are input into computers are based on a decimal system. A common source of error occurs when converted values are rounded. The intermediate arithmetic used to perform the conversion requires greater precision than the target floating point format. It is known that to always insure correctly rounded results, an extremely high precision intermediate arithmetic may be used. However, in many case this is a waste of system memory. To efficiently allocate system memory to this task, the most difficult rounding case is determined. The precision needed to correctly round the most difficult case is then derived. This information is then stored and subsequently used to allocate an efficient amount of storage whenever a numeric base conversion is to take place.

    摘要翻译: 提供了一种用于在计算机系统上执行准确和正确的数字转换的临时存储器的有效分配的方法和装置。 数字基础转换是常见的,因为计算机以二进制操作,而输入计算机的值基于十进制。 当转换值舍入时,会发生常见的错误来源。 用于执行转换的中间算法需要比目标浮点格式更高的精度。 众所周知,为了始终保证正确的圆形结果,可以使用极高精度的中间算术。 然而,在很多情况下,这是浪费系统内存。 为了有效地分配系统内存到这个任务,确定最困难的四舍五入的情况。 然后得出正确回答最困难情况所需的精度。 然后,当信息进行数字转换时,该信息将被存储并随后用于分配有效的存储量。

    Radix converter
    5.
    发明授权
    Radix converter 失效
    RADIX转换器

    公开(公告)号:US3688100A

    公开(公告)日:1972-08-29

    申请号:US3688100D

    申请日:1970-06-30

    申请人: GOLDSBERRY PAUL E

    发明人: GOLDSBERRY PAUL E

    IPC分类号: H03M7/08 G06F5/02

    CPC分类号: H03M7/08

    摘要: Apparatus for converting a number in a first radix to a number in a second radix is disclosed. Conversion of a binary number to a decimal number is accomplished by adding the low order of the decimal value for each position or ordinal in the binary number which contains a one bit or a number descriptor. Carries in the addition are ignored and the sum forms the low order ordinal in the decimal equivalent of the binary number. The sum is subtracted from the binary number and it is divided by the radix of the output number or ten. The series of operations is repeated until the binary number has been completely converted.

    摘要翻译: 公开了用于将第一基数的数字转换为第二基数的装置。 将二进制数转换为十进制数通过在包含一位或数字描述符的二进制数中添加每个位置或序数的十进制值的低位来实现。 加法中的加法被忽略,并且和形成二进制数的十进制等效的低阶序数。 从二进制数减去和,除以输出数的基数或十。 重复一系列操作,直到二进制数被完全转换为止。