公开(公告)号：US20030087492A1

公开(公告)日：2003-05-08

申请号：US10000922

申请日：2001-11-02

Applicant: PROMOS TECHNOLOGIES, INC.

Inventor： Brian Lee ,  Jan G. Zieleman

IPC: H01L021/8234 ,  H01L021/8244 ,  H01L021/8242 ,  H01L021/20

CPC classification number: H01L27/1087 ,  C07K14/43504 ,  C07K14/43595 ,  C07K2319/60 ,  H01L21/3144 ,  H01L21/31604 ,  H01L29/66181

Abstract: The present invention discloses structure and manufacturing method of binary nitride-oxide (NO) dielectric node for deep trench based DRAM devices. In the present invention, a thin strained SiGe layer is deposited prior to poly deposition to modulate the chemical potential unbalance caused by work-function (WF) differences between buried plate and poly. The thin strained SiGe layer will lower the differences by its lower band-gap characteristics at the same doping level, thereby balancing the chemical potential despite of a different doping. The modulation of the chemical potential can be achieved by a proper control of a stochimetric x value. The optimized chemical potential will assure the reliability and robustness of the dielectric node, especially the binary NO dielectric node by suppressing asymmetric charging trapping and charge injection nature.

Abstract translation: 本发明公开了用于深沟槽DRAM器件的二元氮化物（NO）介质节点的结构和制造方法。 在本发明中，在多晶沉积之前沉积薄的应变SiGe层，以调制由掩埋板和多晶硅之间的功函数（WF）差引起的化学势不平衡。 薄应变SiGe层将通过其相同掺杂水平下的较低带隙特性降低差异，从而尽管掺杂不同，仍能平衡化学势。 化学势的调制可以通过适当控制随机值x来实现。 优化的化学势将通过抑制非对称充电捕获和电荷注入性质来确保介质节点，特别是二元NO介质节点的可靠性和鲁棒性。