公开(公告)号：US20030236002A1

公开(公告)日：2003-12-25

申请号：US10376230

申请日：2003-03-03

Applicant: PROMOS TECHNOLOGIES INC.

Inventor： Yung-Hsien Wu ,  Cheng-Che Lee

IPC: H01L021/20 ,  H01L021/31 ,  H01L021/469

CPC classification number: H01L21/02326 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02337 ,  H01L21/3144 ,  H01L21/3185 ,  H01L27/10835 ,  H01L27/1087 ,  H01L29/66181

Abstract: A capacitor dielectric structure of a deep trench capacitor for a DRAM cell. A semiconductor silicon substrate is provided wit a deep trench. Silicon nitride deposition is used to form a silicon nitride layer on the sidewall and bottom of the deep trench. An oxynitride process with wet oxidation and N2O reactive gas is used to form an oxynitride layer on the silicon nitride layer. A post oxynitride growth annealing is performed on the oxynitride layer.

Abstract translation: 用于DRAM单元的深沟槽电容器的电容器电介质结构。 半导体硅衬底具有深沟槽。 氮化硅沉积用于在深沟槽的侧壁和底部上形成氮化硅层。 使用具有湿氧化和N2O反应气体的氧氮化物工艺在氮化硅层上形成氧氮化物层。 在氧氮化物层上进行氧氮化后生长退火。