公开(公告)号：US20130173848A1

公开(公告)日：2013-07-04

申请号：US13341579

申请日：2011-12-30

申请人： Paul A. Lassa ,  Robert D. Selinger ,  Alan W. Sinclair

发明人： Paul A. Lassa ,  Robert D. Selinger ,  Alan W. Sinclair

IPC分类号： G06F12/00

CPC分类号： G06F3/0688 ,  G06F3/0619 ,  G06F3/065 ,  G06F11/1072 ,  G11C29/04

摘要： A controller is presented having one or more interfaces through which to communicate with a plurality of memory dies with multi-level memory cells and an interface through which to communicate with a host. The controller also contains a processor that is configured to receive a command from the host to program data in a plurality of lower pages and a plurality of upper pages of the multi-level memory cells. The controller detects an indication from the host that indicates which previously-programmed lower pages from a previous program command are at risk of being corrupted by the programming of the upper pages from the received program command. Prior to programming the upper pages, the controller backs up the previously-programmed lower pages from the previous program command that are at risk of being corrupted but not the lower pages of data programmed by the received program command.

摘要翻译： 呈现具有一个或多个接口的控制器，通过该接口与具有多级存储器单元的多个存储器管芯通信，以及与主机通信的接口。 控制器还包括处理器，其被配置为从主机接收命令以对多级存储器单元的多个较低页面和多个上部页面中的数据进行编程。 控制器检测来自主机的指示，指示来自先前程序命令的哪些先前编程的下部页面有被接收到的程序命令的上位页编程损坏的危险。 在对页面进行编程之前，控制器将从先前编程的下一个程序命令备份，这些页面有被损坏的危险，而不是由接收的程序命令编程的数据的下一页。

公开(公告)号：US09141308B2

公开(公告)日：2015-09-22

申请号：US13341579

申请日：2011-12-30

申请人： Paul A. Lassa ,  Robert D. Selinger ,  Alan W. Sinclair

发明人： Paul A. Lassa ,  Robert D. Selinger ,  Alan W. Sinclair

IPC分类号： G06F12/00 ,  G06F3/06 ,  G06F11/10 ,  G11C29/04

CPC分类号： G06F3/0688 ,  G06F3/0619 ,  G06F3/065 ,  G06F11/1072 ,  G11C29/04

摘要： A controller is presented having one or more interfaces through which to communicate with a plurality of memory dies with multi-level memory cells and an interface through which to communicate with a host. The controller also contains a processor that is configured to receive a command from the host to program data in a plurality of lower pages and a plurality of upper pages of the multi-level memory cells. The controller detects an indication from the host that indicates which previously-programmed lower pages from a previous program command are at risk of being corrupted by the programming of the upper pages from the received program command. Prior to programming the upper pages, the controller backs up the previously-programmed lower pages from the previous program command that are at risk of being corrupted but not the lower pages of data programmed by the received program command.

摘要翻译： 呈现具有一个或多个接口的控制器，通过该接口与具有多级存储器单元的多个存储器管芯通信，以及与主机通信的接口。 控制器还包括处理器，其被配置为从主机接收命令以对多级存储器单元的多个较低页面和多个上部页面中的数据进行编程。 控制器检测来自主机的指示，指示来自先前程序命令的哪些先前编程的下部页面有被接收到的程序命令的上位页编程损坏的危险。 在对页面进行编程之前，控制器将从先前编程的下一个程序命令备份，这些页面有被损坏的危险，而不是由接收的程序命令编程的数据的下一页。

公开(公告)号：US08700961B2

公开(公告)日：2014-04-15

申请号：US13330975

申请日：2011-12-20

申请人： Paul A. Lassa ,  Alan W. Sinclair

发明人： Paul A. Lassa ,  Alan W. Sinclair

IPC分类号： G11C29/00

CPC分类号： G06F12/0246 ,  G06F3/0613 ,  G06F3/064 ,  G06F3/0679 ,  G06F2212/1016 ,  G06F2212/7208 ,  G11C29/883

摘要： A controller communicates with a plurality of multi-chip memory packages. Each multi-chip memory package comprises a plurality of memory dies, each having a respective plurality of memory blocks, some of which are good and some of which are bad. The controller determines a number of good blocks in each memory die. Based on the determined number of good blocks in each memory die, the controller selects a memory die from each of the multi-chip memory packages to access in parallel, wherein the selected memory dies are not necessarily all in the same relative position in each multi-chip package. The controller then creates a metablock from a set of good blocks from each of the selected memory dies, wherein a maximum number of metablocks that can be created across the selected memory dies is determined by a lowest number of good blocks in the selected memory dies.

摘要翻译： 控制器与多个多芯片存储器包进行通信。 每个多芯片存储器封装包括多个存储器管芯，每个存储器管芯具有相应的多个存储器块，其中一些存储器块是好的，其中一些是不好的。 控制器确定每个存储器管芯中的多个好的块。 基于每个存储器管芯中所确定的良好块的数量，控制器从每个多芯片存储器封装中选择并行访问的存储器管芯，其中所选择的存储器管芯不一定在每个多个存储器管芯中处于相同的相对位置 芯片封装 然后，控制器从来自所选择的每个存储器管芯的一组好的块中创建一个元区块，其中可以通过所选择的存储器管芯中的最低数量的好块来确定跨所选择的存储器管芯可以创建的最大数量的元区块。

公开(公告)号：US20130159601A1

公开(公告)日：2013-06-20

申请号：US13330975

申请日：2011-12-20

申请人： Paul A. Lassa ,  Alan W. Sinclair

发明人： Paul A. Lassa ,  Alan W. Sinclair

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F3/0613 ,  G06F3/064 ,  G06F3/0679 ,  G06F2212/1016 ,  G06F2212/7208 ,  G11C29/883

摘要： A controller communicates with a plurality of multi-chip memory packages. Each multi-chip memory package comprises a plurality of memory dies, each having a respective plurality of memory blocks, some of which are good and some of which are bad. The controller determines a number of good blocks in each memory die. Based on the determined number of good blocks in each memory die, the controller selects a memory die from each of the multi-chip memory packages to access in parallel, wherein the selected memory dies are not necessarily all in the same relative position in each multi-chip package. The controller then creates a metablock from a set of good blocks from each of the selected memory dies, wherein a maximum number of metablocks that can be created across the selected memory dies is determined by a lowest number of good blocks in the selected memory dies.

摘要翻译： 控制器与多个多芯片存储器包进行通信。 每个多芯片存储器封装包括多个存储器管芯，每个存储器管芯具有相应的多个存储器块，其中一些存储器块是好的，其中一些是不好的。 控制器确定每个存储器管芯中的多个好的块。 基于每个存储器管芯中所确定的良好块的数量，控制器从每个多芯片存储器封装中选择并行访问的存储器管芯，其中所选择的存储器管芯不一定在每个多个存储器管芯中处于相同的相对位置 芯片封装 然后，控制器从来自所选择的存储器管芯的每一个的一组好的块创建元区块，其中可以通过所选择的存储器管芯中的最低数量的好块来确定跨所选择的存储器管芯可以创建的最大数量的元区块。

公开(公告)号：US08205063B2

公开(公告)日：2012-06-19

申请号：US12346433

申请日：2008-12-30

申请人： Alan W. Sinclair

发明人： Alan W. Sinclair

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/7201

摘要： A method and system writes data to a memory device including dynamic assignment of logical block addresses (LBAs) to physical write blocks. The method includes receiving a request to write data for a logical block address within an LBA range to the memory device. The method assigns the LBA range to a particular write block exclusively or non-exclusively, depending on the existence of previously assigned write blocks and the availability of unwritten blocks. A data structure may be utilized to record the recent usage of blocks for assigning non-exclusive write blocks. An intermediate storage area may be included that implements the dynamic assignment of LBA ranges to physical write blocks. Data in the intermediate storage area may be consolidated and written to the main storage area. Lower fragmentation and write amplification ratios may result by using this method and system.

摘要翻译： 方法和系统将数据写入存储器件，包括逻辑块地址（LBA）到物理写入块的动态分配。 该方法包括接收向LBA范围内的逻辑块地址写入数据到存储器件的请求。 该方法根据先前分配的写入块的存在和未写入块的可用性，将LBA范围专门或非排他地分配给特定的写入块。 可以使用数据结构来记录用于分配非排他性写入块的块的最近使用。 可以包括实现LBA范围到物理写入块的动态分配的中间存储区域。 中间存储区域中的数据可以被合并并写入主存储区域。 通过使用该方法和系统可能导致较低的分段和写入放大率。

公开(公告)号：US07984233B2

公开(公告)日：2011-07-19

申请号：US12774109

申请日：2010-05-05

申请人： Alan W. Sinclair

发明人： Alan W. Sinclair

IPC分类号： G06F12/00 ,  G06F9/26 ,  G06F9/34

CPC分类号： G06F12/0246 ,  G06F3/0607 ,  G06F3/0643 ,  G06F3/0679 ,  G06F2212/7201

摘要： Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. The file based interface between the host and memory systems allows the memory system controller to utilize the data storage blocks within the memory with increased efficiency.

摘要翻译： 主机系统数据文件直接写入具有每个文件的唯一标识和文件内数据偏移的大型擦除块闪存系统，但不使用任何中间逻辑地址或存储器的虚拟地址空间。 文件存储在存储器中的目录信息由其控制器而不是由主机保存在存储器系统内。 主机和存储器系统之间的基于文件的接口允许存储器系统控制器以更高的效率利用存储器内的数据存储块。

公开(公告)号：US20110161621A1

公开(公告)日：2011-06-30

申请号：US12650182

申请日：2009-12-30

申请人： Alan W. Sinclair ,  Nicholas J. Thomas

发明人： Alan W. Sinclair ,  Nicholas J. Thomas

IPC分类号： G06F12/10 ,  G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/7205

摘要： Methods of maintaining an address table for mapping logical addresses to physical addresses include continuously consolidating main address maps and an update address map, and periodically compacting the update address map. Consolidating includes selecting a main address map, reading valid mapping entries from the main and update address maps, constructing a mapping set including the valid mapping entries, and writing the mapping set to a second main address map. The update address map is compacted if a criterion is met, and includes copying the valid mapping entries to an unwritten block or metablock and assigning the unwritten block or metablock as a new update address map. The length of consolidation may depend on the average length of compacted mapping entries following a compaction operation. Increased performance due to lower maintenance overhead may result by using these methods.

摘要翻译： 维护用于将逻辑地址映射到物理地址的地址表的方法包括连续合并主地址映射和更新地址映射，并且周期性地压缩更新地址映射。 合并包括选择主地址映射，从主地址映射和更新地址映射读取有效的映射条目，构建包括有效映射条目的映射集，以及将映射集写入第二主地址映射。 如果满足标准，则更新地址映射被压缩，并且包括将有效的映射条目复制到未写入的块或元区块，并将未写入的块或元区块分配为新的更新地址映射。 合并的长度可能取决于压实操作之后压实的映射条目的平均长度。 通过使用这些方法可能导致由于较低的维护开销而导致的性能提高。

公开(公告)号：US07949845B2

公开(公告)日：2011-05-24

申请号：US11459255

申请日：2006-07-21

申请人： Alan W. Sinclair ,  Barry Wright

发明人： Alan W. Sinclair ,  Barry Wright

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/0246 ,  G06F2212/7201

摘要： Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. Each data file is uniquely identified in a file directory, which points to entries in a file index table (FIT) of data groups that make up the file and their physical storage locations in the memory.

摘要翻译： 主机系统数据文件直接写入具有每个文件的唯一标识和文件内数据偏移的大型擦除块闪存系统，但不使用任何中间逻辑地址或存储器的虚拟地址空间。 文件存储在存储器中的目录信息由其控制器而不是由主机保存在存储器系统内。 每个数据文件在文件目录中唯一标识，文件目录指向构成文件的数据组的文件索引表（FIT）中的条目及其在存储器中的物理存储位置。

公开(公告)号：US07917686B2

公开(公告)日：2011-03-29

申请号：US11616228

申请日：2006-12-26

申请人： Alan W. Sinclair ,  Barry Wright

发明人： Alan W. Sinclair ,  Barry Wright

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0679

摘要： Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typically, but not necessarily, generates the data files. The number of logical blocks containing data of any one file is controlled in a manner that reduces the amount of fragmentation of file data within the physical memory blocks, thereby to maintain good memory performance. The host may configure the logical blocks of the address space in response to learning the physical characteristics of a memory to which it is connected.

摘要翻译： 数据文件在具有物理存储器单元块的通常类型的闪存系统的连续逻辑地址空间接口（LBA接口）的一个或多个逻辑块内被分配地址。 该分配可以由主机设备完成，主机设备通常但不一定生成数据文件。 以减少物理存储器块内的文件数据的分段量的方式控制包含任何一个文件的数据的逻辑块的数量，从而保持良好的存储器性能。 响应于学习与其连接的存储器的物理特性，主机可以配置地址空间的逻辑块。

公开(公告)号：US07814262B2

公开(公告)日：2010-10-12

申请号：US11250794

申请日：2005-10-13

申请人： Alan W. Sinclair

发明人： Alan W. Sinclair

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F13/12 ,  G06F13/38

CPC分类号： G06F12/0246 ,  G06F2212/401

摘要： A change in the amount of data to be stored that results from various encoding, compression, encryption or other data transformation algorithms, is handled by individually identifying distinct units of the transformed data and storing such units in physical succession within storage blocks of a memory system such as flash memory. The data being stored may come from a host system external to the memory system or from an application running on a processor within the memory system.

摘要翻译： 由各种编码，压缩，加密或其他数据变换算法产生的要存储的数据量的变化通过单独地识别经变换的数据的不同单元并将这些单元在物理上连续存储在存储器系统的存储块内来处理 如闪存。 存储的数据可以来自存储器系统外部的主机系统或来自在存储器系统内的处理器上运行的应用程序。