公开(公告)号：US20160225987A1

公开(公告)日：2016-08-04

申请号：US14916950

申请日：2014-03-31

申请人： PEKING UNIVERSITY

发明人： Ru HUANG ,  Muxi YU ,  Yimao CAI ,  Zhenxing ZHANG ,  Qiang LI ,  Ming LI

IPC分类号： H01L45/00

CPC分类号： H01L45/146 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1675

摘要： Disclosed is a resistive random access memory, comprising a substrate, an insulating layer, a bottom electrode, a resistive material film, and a top electrode in an order from bottom to top, wherein the resistive material film is a four-layer structure composed of a same metal oxide; and the four layers in the four-layer structure from bottom to top have resistance values which are increased one after another by more than 10 times, oxygen concentrations which are increased one after another and thickness which are decreased one after another. The present invention may achieve complete formation-rupture of oxygen vacancy conductive filaments (CF) in each layer by dividing the resistive material film of the same metal oxide into four layers according to the different oxygen concentrations, so as to control accurately the resistance values, so that 2-bit storage with high uniformity is achieved.

摘要翻译： 公开了一种电阻随机存取存储器，其从底部到顶部的顺序包括基板，绝缘层，底部电极，电阻材料膜和顶部电极，其中电阻材料膜是四层结构， 相同的金属氧化物; 并且四层结构中的四层从底部到顶部具有一个接一个地增加大于十次的电阻值，一个接一个地增加的氧浓度和一个接一个地减小的氧浓度。 本发明可以通过根据不同的氧浓度将相同金属氧化物的电阻材料膜分成四层来实现每层中的氧空位导电细丝（CF）的完全形成破裂，从而精确地控制电阻值， 从而实现了高均匀性的2位存储。

公开(公告)号：US20240339138A1

公开(公告)日：2024-10-10

申请号：US18629556

申请日：2024-04-08

申请人： Peking University

发明人： Zongwei WANG ,  Yimao CAI ,  Yunfan YANG ,  Linbo SHAN ,  Ru HUANG

IPC分类号： G11C7/16 ,  G11C7/10

CPC分类号： G11C7/16 ,  G11C7/1012

摘要： A compute-in-memory (CIM) circuit and a control method thereof. The CIM circuit includes a memory array. The memory array comprises n1 memory blocks arranged in sequence from top to bottom, and each memory block comprises n2 rows of memory-cell rows arranged in sequence, wherein n1≥2, n2≥1. Each odd memory block and an adjacent even memory block arranged therebelow form a memory group. Each memory group comprises n2 pairs of memory-cell rows, and a k-th pair of memory-cell rows in each memory group includes a k-th memory-cell row and a (2n2+1−k)-th memory-cell row in the corresponding memory group, where 1≤k≤n2. The memory array is divided into n2 memory subarrays configured to be turned on in sequence for calculation, wherein a k-th memory subarray includes the k-th pair of memory-cell rows in each memory group.

公开(公告)号：US20240241696A1

公开(公告)日：2024-07-18

申请号：US18015200

申请日：2021-10-27

申请人： BOE TECHNOLOGY GROUP CO., LTD. ,  Peking University

发明人： Xiangye WEI ,  Ming ZHAO ,  Wei HU ,  Yimao CAI ,  Shengyi HE ,  Yiming BAI ,  Xinyu ZHOU

IPC分类号： G06F7/58 ,  H03K19/20

CPC分类号： G06F7/586 ,  H03K19/20

摘要： A random number generator includes: a random number generating circuit used for generating a pulse signal based on a control word and generating a random number signal according to the pulse signal, the pulse signal including a first frequency signal and a second frequency signal that appear alternately, and proportions of the first frequency signal and the second frequency signal being controlled by the control word; and a feedback update circuit used for updating the control word based on the random number signal output by the random number generating circuit.