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    Decoupling the number of logical threads from the number of simultaneous physical threads in a processor
    1.
    发明申请
    Decoupling the number of logical threads from the number of simultaneous physical threads in a processor 有权
    从处理器中同时处理的物理线程的数量解耦逻辑线程数

    公开(公告)号：US20050193278A1

    公开(公告)日：2005-09-01

    申请号：US10745527

    申请日：2003-12-29

    申请人： Per Hammarlund ,  Stephan Jourdan ,  Pierre Michaud ,  Alexandre Farcy ,  Morris Marden ,  Robert Hinton ,  Douglas Carmean

    发明人： Per Hammarlund ,  Stephan Jourdan ,  Pierre Michaud ,  Alexandre Farcy ,  Morris Marden ,  Robert Hinton ,  Douglas Carmean

    IPC分类号： G06F9/48 ,  G06F11/00

    CPC分类号： G06F9/485 ,  G06F9/3851

    摘要： Systems and methods of managing threads provide for supporting a plurality of logical threads with a plurality of simultaneous physical threads in which the number of logical threads may be greater than or less than the number of physical threads. In one approach, each of the plurality of logical threads is maintained in one of a wait state, an active state, a drain state, and a stall state. A state machine and hardware sequencer can be used to transition the logical threads between states based on triggering events and whether or not an interruptible point has been encountered in the logical threads. The logical threads are scheduled on the physical threads to meet, for example, priority, performance or fairness goals. It is also possible to specify the resources that are available to each logical thread in order to meet these and other, goals. In one example, a single logical thread can speculatively use more than one physical thread, pending a selection of which physical thread should be committed.

    摘要翻译： 管理线程的系统和方法提供支持具有多个同时物理线程的多个逻辑线程，其中逻辑线程的数量可以大于或小于物理线程的数量。 在一种方法中，多个逻辑线程中的每一个维持在等待状态，活动状态，排出状态和失速状态之一。 可以使用状态机和硬件定序器来基于触发事件来转换状态之间的逻辑线程，以及是否在逻辑线程中遇到可中断点。 逻辑线程被安排在物理线程上以满足例如优先级，性能或公平性目标。 也可以指定每个逻辑线程可用的资源，以满足这些目标和其他目标。 在一个示例中，单个逻辑线程可以推测使用多个物理线程，等待选择要提交哪个物理线程。

    Decoupling the number of logical threads from the number of simultaneous physical threads in a processor
    8.
    发明授权
    Decoupling the number of logical threads from the number of simultaneous physical threads in a processor 有权
    从处理器中同时处理的物理线程的数量解耦逻辑线程数

    公开(公告)号：US07797683B2

    公开(公告)日：2010-09-14

    申请号：US10745527

    申请日：2003-12-29

    申请人： Per H. Hammarlund ,  Stephan J. Jourdan ,  Pierre Michaud ,  Alexandre J. Farcy ,  Morris Marden ,  Robert L. Hinton ,  Douglas M. Carmean

    发明人： Per H. Hammarlund ,  Stephan J. Jourdan ,  Pierre Michaud ,  Alexandre J. Farcy ,  Morris Marden ,  Robert L. Hinton ,  Douglas M. Carmean

    IPC分类号： G06F9/44

    CPC分类号： G06F9/485 ,  G06F9/3851

    摘要： Systems and methods of managing threads provide for supporting a plurality of logical threads with a plurality of simultaneous physical threads in which the number of logical threads may be greater than or less than the number of physical threads. In one approach, each of the plurality of logical threads is maintained in one of a wait state, an active state, a drain state, and a stall state. A state machine and hardware sequencer can be used to transition the logical threads between states based on triggering events and whether or not an interruptible point has been encountered in the logical threads. The logical threads are scheduled on the physical threads to meet, for example, priority, performance or fairness goals. It is also possible to specify the resources that are available to each logical thread in order to meet these and other, goals. In one example, a single logical thread can speculatively use more than one physical thread, pending a selection of which physical thread should be committed.

    摘要翻译： 管理线程的系统和方法提供支持具有多个同时物理线程的多个逻辑线程，其中逻辑线程的数量可以大于或小于物理线程的数量。 在一种方法中，多个逻辑线程中的每一个维持在等待状态，活动状态，排出状态和失速状态之一。 可以使用状态机和硬件定序器来基于触发事件来转换状态之间的逻辑线程，以及是否在逻辑线程中遇到可中断点。 逻辑线程被安排在物理线程上以满足例如优先级，性能或公平性目标。 也可以指定每个逻辑线程可用的资源，以满足这些目标和其他目标。 在一个示例中，单个逻辑线程可以推测使用多个物理线程，等待选择要提交哪个物理线程。

    Detecting and resolving locks in a memory unit
    9.
    发明授权
    Detecting and resolving locks in a memory unit 有权
    检测和解决内存单元中的锁

    公开(公告)号：US07590784B2

    公开(公告)日：2009-09-15

    申请号：US11513636

    申请日：2006-08-31

    申请人： Prakash Math ,  Matthew Merten ,  Sebastien Hily ,  Beeman Strong ,  Morris Marden ,  David Burns

    发明人： Prakash Math ,  Matthew Merten ,  Sebastien Hily ,  Beeman Strong ,  Morris Marden ,  David Burns

    IPC分类号： G06F13/00

    CPC分类号： G06F13/161 ,  G06F9/524

    摘要： In one embodiment, the present invention includes an apparatus having a first counter to count dispatches of a senior request in a memory unit, a second counter to count cycles of a processor coupled to the memory unit, and a controller coupled to the first and second counters to execute one or more one remediation measures with respect to the senior request based on a value of at least one of the counters. Other embodiments are described and claimed.

    摘要翻译： 在一个实施例中，本发明包括一种具有第一计数器的装置，用于计数存储器单元中的高级请求的分配，耦合到存储器单元的处理器的计数周期的第二计数器以及耦合到第一和第二 计数器根据至少一个计数器的值对高级请求执行一个或多个修复措施。 描述和要求保护其他实施例。

    PROVIDING QUALITY OF SERVICE VIA THREAD PRIORITY IN A HYPER-THREADED MICROPROCESSOR
    10.
    发明申请
    PROVIDING QUALITY OF SERVICE VIA THREAD PRIORITY IN A HYPER-THREADED MICROPROCESSOR 有权
    在超级螺旋式微处理器中通过螺纹优先提供的服务质量

    公开(公告)号：US20090049446A1

    公开(公告)日：2009-02-19

    申请号：US11838458

    申请日：2007-08-14

    申请人： Matthew Merten ,  Santhosh Srinath ,  Morris Marden ,  John Holm ,  Glenn Hinton

    发明人： Matthew Merten ,  Santhosh Srinath ,  Morris Marden ,  John Holm ,  Glenn Hinton

    IPC分类号： G06F9/46

    CPC分类号： G06F9/5011 ,  G06F9/3851 ,  G06F2209/507

    摘要： A method and apparatus for providing quality of service in a multi-processing element environment based on priority is herein described. Consumption of resources, such as a reservation station and a pipeline, are biased towards a higher priority processing element. In a reservation station, mask elements are set to provide access for higher priority processing elements to more reservation entries. In a pipeline, bias logic provides a ratio of preference for selection of a high priority processing

    摘要翻译： 这里描述了一种基于优先级在多处理元件环境中提供服务质量的方法和装置。 诸如保留站和流水线等资源的消耗偏向较高优先级的处理要素。 在保留站中，设置掩码元素以提供对较高优先级处理元素的访问以获得更多的预留条目。 在流水线中，偏置逻辑提供用于选择高优先级处理的偏好比率