System authorizing direct data transfers between memories of several components of that system
    1.
    发明授权
    System authorizing direct data transfers between memories of several components of that system 有权
    系统授权在该系统的几个组件的存储器之间进行直接数据传输

    公开(公告)号:US09053092B2

    公开(公告)日:2015-06-09

    申请号:US13513040

    申请日:2010-11-24

    IPC分类号: G06F3/00 G06F13/28 G06F13/40

    摘要: The invention relates in particular to a computer system including peripheral devices (600) and at least one switch (605) connected to each device. A first device includes a means for initiating a control of direct access to memory areas, each one of which is associated with a separate element of the system. The switch includes a means for transmitting at least a portion of the control to each element. At least one element comprises a second device including a means for receiving at least one control of direct access to a memory area of said second device, said control being received from said first device via said switch, and a means for transmitting said received control to a component of said second device. Said system allows said first device to perform a direct data transfer to or from a memory of said first peripheral device from or to each element.

    摘要翻译: 本发明具体涉及包括连接到每个设备的外围设备(600)和至少一个开关(605)的计算机系统。 第一设备包括用于启动对存储器区域的直接访问的控制的装置,每个存储器区域与系统的单独元件相关联。 开关包括用于将至少一部分控制传送到每个元件的装置。 至少一个元件包括第二设备,其包括用于接收至少一个直接访问所述第二设备的存储区域的控制的装置,所述控制是经由所述交换机从所述第一设备接收的,以及用于将所述接收到的控制发送到 所述第二装置的部件。 所述系统允许所述第一设备执行从或从每个元件到所述第一外围设备的存储器或从所述第一外围设备的存储器的直接数据传输。

    CONTROLLER FOR DIRECT ACCESS TO A MEMORY FOR THE DIRECT TRANSFER OF DATA BETWEEN MEMORIES OF SEVERAL PERIPHERAL DEVICES, METHOD AND COMPUTER PROGRAM ENABLING THE IMPLEMENTATION OF SUCH A CONTROLLER
    2.
    发明申请
    CONTROLLER FOR DIRECT ACCESS TO A MEMORY FOR THE DIRECT TRANSFER OF DATA BETWEEN MEMORIES OF SEVERAL PERIPHERAL DEVICES, METHOD AND COMPUTER PROGRAM ENABLING THE IMPLEMENTATION OF SUCH A CONTROLLER 有权
    用于直接访问用于直接传输数字的存储器的控制器,用于几个外围设备的存储器,方法和使用这样一个控制器的实现的计​​算机程序

    公开(公告)号:US20120260005A1

    公开(公告)日:2012-10-11

    申请号:US13513092

    申请日:2010-11-24

    IPC分类号: G06F13/28

    CPC分类号: G06F13/28 Y02D10/14

    摘要: The subject of the invention is in particular the direct transfer of data between first and second peripherals connected via a communication bus. For this purpose, the first peripheral comprises a controller for direct access to a memory having means (425) for initiating at least one command for direct access to a region of a memory external to said first peripheral and means (400) for receiving at least one command for direct access to a region of a memory of said first peripheral, said command being received from said at least one second peripheral, and means (415) for transmitting said at least one received direct access command to a component of said first peripheral. The controller thus allows a controller of direct access to a memory of said at least one second peripheral to carry out a direct transfer of at least one data item to or from a memory of said first peripheral from or to said second peripheral.

    摘要翻译: 本发明的主题特别是经由通信总线连接的第一和第二外围设备之间的数据的直接传送。 为此目的,第一外围设备包括用于直接访问存储器的控制器,该存储器具有用于发起用于直接访问所述第一外围设备的存储器区域的至少一个命令的装置(425)和用于至少接收的装置(400) 一个用于直接访问所述第一外围设备的存储器的区域的命令,所述命令从所述至少一个第二外围设备接收,以及用于将所述至少一个接收到的直接访问命令发送到所述第一外围设备的组件的装置(415) 。 因此,控制器允许直接访问所述至少一个第二外围设备的存储器的控制器执行至少一个数据项到所述第一外围设备的存储器或从所述第二外围设备的存储器直接传送到所述第二外围设备的存储器。

    Controller for direct access to a memory for the direct transfer of data between memories of several peripheral devices, method and computer program enabling the implementation of such a controller
    3.
    发明授权
    Controller for direct access to a memory for the direct transfer of data between memories of several peripheral devices, method and computer program enabling the implementation of such a controller 有权
    用于直接访问存储器的控制器,用于在若干外围设备的存储器之间直接传送数据,方法和计算机程序,从而实现这种控制器

    公开(公告)号:US08990451B2

    公开(公告)日:2015-03-24

    申请号:US13513092

    申请日:2010-11-24

    IPC分类号: G06F13/28

    CPC分类号: G06F13/28 Y02D10/14

    摘要: The subject of the invention is in particular the direct transfer of data between first and second peripherals connected via a communication bus. For this purpose, the first peripheral comprises a controller for direct access to a memory having means (425) for initiating at least one command for direct access to a region of a memory external to said first peripheral and means (400) for receiving at least one command for direct access to a region of a memory of said first peripheral, said command being received from said at least one second peripheral, and means (415) for transmitting said at least one received direct access command to a component of said first peripheral. The controller thus allows a controller of direct access to a memory of said at least one second peripheral to carry out a direct transfer of at least one data item to or from a memory of said first peripheral from or to said second peripheral.

    摘要翻译: 本发明的主题特别是经由通信总线连接的第一和第二外围设备之间的数据的直接传送。 为此目的,第一外围设备包括用于直接访问存储器的控制器,该存储器具有用于发起用于直接访问所述第一外围设备的存储器区域的至少一个命令的装置(425)和用于至少接收的装置(400) 一个用于直接访问所述第一外围设备的存储器的区域的命令,所述命令从所述至少一个第二外围设备接收,以及用于将所述至少一个接收到的直接访问命令发送到所述第一外围设备的组件的装置(415) 。 因此,控制器允许直接访问所述至少一个第二外围设备的存储器的控制器执行至少一个数据项到所述第一外围设备的存储器或从所述第二外围设备的存储器直接传送到所述第二外围设备的存储器。

    SYSTEM AUTHORIZING DIRECT DATA TRANSFERS BETWEEN MEMORIES OF SEVERAL COMPONENTS OF THAT SYSTEM
    4.
    发明申请
    SYSTEM AUTHORIZING DIRECT DATA TRANSFERS BETWEEN MEMORIES OF SEVERAL COMPONENTS OF THAT SYSTEM 有权
    系统授权系统的几个组件的记忆之间的直接数据传输

    公开(公告)号:US20120239826A1

    公开(公告)日:2012-09-20

    申请号:US13513040

    申请日:2010-11-24

    IPC分类号: G06F3/00

    摘要: The invention relates in particular to a computer system including peripheral devices (600) and at least one switch (605) connected to each device. A first device includes a means for initiating a control of direct access to memory areas, each one of which is associated with a separate element of the system. The switch includes a means for transmitting at least a portion of the control to each element. At least one element comprises a second device including a means for receiving at least one control of direct access to a memory area of said second device, said control being received from said first device via said switch, and a means for transmitting said received control to a component of said second device. Said system allows said first device to perform a direct data transfer to or from a memory of said first peripheral device from or to each element.

    摘要翻译: 本发明具体涉及包括连接到每个设备的外围设备(600)和至少一个开关(605)的计算机系统。 第一设备包括用于启动对存储器区域的直接访问的控制的装置,每个存储器区域与系统的单独元件相关联。 开关包括用于将至少一部分控制传送到每个元件的装置。 至少一个元件包括第二设备,其包括用于接收至少一个直接访问所述第二设备的存储区域的控制的装置,所述控制是经由所述交换机从所述第一设备接收的,以及用于将所述接收到的控制发送到 所述第二装置的部件。 所述系统允许所述第一设备执行从或从每个元件到所述第一外围设备的存储器或从所述第一外围设备的存储器的直接数据传输。

    METHOD OF PSEUDO-DYNAMIC ROUTING IN A CLUSTER COMPRISING STATIC COMMUNICATION LINKS AND COMPUTER PROGRAM IMPLEMENTING THAT METHOD
    5.
    发明申请
    METHOD OF PSEUDO-DYNAMIC ROUTING IN A CLUSTER COMPRISING STATIC COMMUNICATION LINKS AND COMPUTER PROGRAM IMPLEMENTING THAT METHOD 有权
    包含静态通信链路的群集中的PSEUDO-DYNAMIC路由方法和实现该方法的计算机程序

    公开(公告)号:US20130070647A1

    公开(公告)日:2013-03-21

    申请号:US13701452

    申请日:2011-05-25

    IPC分类号: H04L12/28

    摘要: The invention relates to the pseudo-dynamic routing in a cluster comprising nodes, of the static communication links connecting these nodes. The routing is based on load levels associated with the links After having received (635) a list of node identifiers, these identifiers designating a set of nodes allotted to the execution of a task, a weight having a first predetermined value is assigned (655) to a pair formed of an identifier of a first and of a second node of said set of nodes, the first and second nodes being distinct, a weight having a second predetermined value, distinct from the first value, being assigned by default to the formed pairs of identifiers of nodes allotted to different tasks. The cluster is then routed, the routing comprising the selecting (610) of a route between the first and second nodes and the incrementing (625) of a load level associated with each link comprising the selected route of the first value.

    摘要翻译: 本发明涉及包括连接这些节点的静态通信链路的节点的群集中的伪动态路由。 路由基于与链路相关联的负载水平在接收(635)节点标识符列表之后,这些标识符指定分配给任务执行的一组节点,分配具有第一预定值的权重(655) 到由所述节点集合中的第一和第二节点的标识符形成的对,所述第一和第二节点是不同的,具有与所述第一值不同的第二预定值的权重默认地分配给所形成的 分配给不同任务的节点对的标识符对。 然后路由群集,路由包括在第一和第二节点之间的路由的选择(610)和与包括所选择的第一个值的路线的每个链路相关联的负载水平的递增(625)。

    METHOD OF OPTIMIZING ROUTING IN A CLUSTER COMPRISING STATIC COMMUNICATION LINKS AND COMPUTER PROGRAM IMPLEMENTING THAT METHOD
    7.
    发明申请
    METHOD OF OPTIMIZING ROUTING IN A CLUSTER COMPRISING STATIC COMMUNICATION LINKS AND COMPUTER PROGRAM IMPLEMENTING THAT METHOD 有权
    在包含静态通信链路的集群中优化路由的方法和实现该方法的计算机程序

    公开(公告)号:US20130067113A1

    公开(公告)日:2013-03-14

    申请号:US13698957

    申请日:2011-05-13

    IPC分类号: G06F15/173

    CPC分类号: H04L45/125

    摘要: The invention relates in particular to the optimization of routing in a cluster comprising a plurality of nodes and static communication links connecting nodes of the plurality of nodes, said routing being based on load levels associated with the communication links. In order to establish a connection between at least two nodes of the cluster that have been identified (505), at least one route is determined (510) that connects the identified nodes according to the communication links, said route being determined according to the nodes identified, communication links and at least one load level associated with each communication link. A determined route is selected. Subsequently, a value of weight associated with the selected route is estimated (520) and a load level associated with each communication link of the selected route is incremented (525).

    摘要翻译: 本发明特别涉及在包括多个节点的群集中的路由优化以及连接多个节点中的节点的静态通信链路,所述路由基于与通信链路相关联的负载水平。 为了建立已经识别的集群的至少两个节点之间的连接(505),根据通信链路确定连接所识别的节点的至少一个路由(510),所述路由根据节点确定 识别的通信链路和与每个通信链路相关联的至少一个负载级别。 选择确定的路线。 随后,估计与所选路由相关联的加权值(520),并且增加与所选路由的每个通信链路相关联的负载水平(525)。

    Method of pseudo-dynamic routing in a cluster comprising static communication links and computer program implementing that method
    8.
    发明授权
    Method of pseudo-dynamic routing in a cluster comprising static communication links and computer program implementing that method 有权
    包含静态通信链路的群集中的伪动态路由方法和实现该方法的计算机程序

    公开(公告)号:US09203733B2

    公开(公告)日:2015-12-01

    申请号:US13701452

    申请日:2011-05-25

    摘要: The invention relates to the pseudo-dynamic routing in a cluster comprising nodes, of the static communication links connecting these nodes. The routing is based on load levels associated with the links. After having received (635) a list of node identifiers, these identifiers designating a set of nodes allotted to the execution of a task, a weight having a first predetermined value is assigned (655) to a pair formed of an identifier of a first and of a second node of said set of nodes, the first and second nodes being distinct, a weight having a second predetermined value, distinct from the first value, being assigned by default to the formed pairs of identifiers of nodes allotted to different tasks. The cluster is then routed, the routing comprising the selecting (610) of a route between the first and second nodes and the incrementing (625) of a load level associated with each link comprising the selected route of the first value.

    摘要翻译: 本发明涉及包括连接这些节点的静态通信链路的节点的群集中的伪动态路由。 路由是基于与链路相关联的负载级别。 在接收到(635)节点标识符的列表之后,这些标识符指定分配给任务的执行的一组节点,具有第一预定值的权重被分配(655)到由第一和第 所述第一和第二节点是不同的,具有与第一值不同的第二预定值的权重默认地分配给分配给不同任务的节点的标识符的形成对。 然后路由群集,路由包括在第一和第二节点之间的路由的选择(610)和与包括所选择的第一个值的路线的每个链路相关联的负载水平的递增(625)。

    METHOD FOR OPTIMIZING MEMORY ACCESS IN A MICROPROCESSOR INCLUDING SEVERAL LOGIC CORES UPON RESUMPTION OF EXECUTING AN APPLICATION, AND COMPUTER PROGRAM IMPLEMENTING SUCH A METHOD
    9.
    发明申请
    METHOD FOR OPTIMIZING MEMORY ACCESS IN A MICROPROCESSOR INCLUDING SEVERAL LOGIC CORES UPON RESUMPTION OF EXECUTING AN APPLICATION, AND COMPUTER PROGRAM IMPLEMENTING SUCH A METHOD 有权
    用于优化微处理器中的存储器访问的方法,包括执行应用程序的恢复,以及实现这种方法的计算机程序

    公开(公告)号:US20130111152A1

    公开(公告)日:2013-05-02

    申请号:US13581279

    申请日:2011-07-07

    IPC分类号: G06F9/50

    摘要: The invention relates in particular to optimizing memory access in a microprocessor including several logic cores upon the resumption of executing a main application, and enabling the simultaneous execution of at least two processes in an environment including a hierarchically organized shared memory including a top portion and a bottom portion, a datum being copied from the bottom portion to the top portion for processing by the application. The computer is adapted to interrupt the execution of the main application. Upon an interruption in the execution of said application, a reference to a datum stored in a top portion of the memory is stored, wherein said datum must be used in order to enable the execution of the application. After programming a resumption of the execution of the application and before the resumption thereof, said datum is accessed in a bottom portion of the memory in accordance with the reference to be stored in a top portion of the memory.

    摘要翻译: 本发明特别涉及在恢复执行主应用程序时优化包括若干逻辑核心的微处理器中的存储器访问,并且能够在包括分层组织的共享存储器的环境中同时执行至少两个进程,包括顶部和 底部,基底从底部复制到顶部以供应用处理。 该计算机适用于中断主应用程序的执行。 在所述应用的执行中断时,存储对存储在存储器的顶部的数据的引用,其中必须使用所述数据以便能够执行应用。 在编程应用程序的执行程序的编程之后并在其恢复之前,根据要存储在存储器的顶部部分的参考,在存储器的底部部分访问所述数据。