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公开(公告)号:US09020148B2
公开(公告)日:2015-04-28
申请号:US13030317
申请日:2011-02-18
CPC分类号: G06F21/75 , G06F21/72 , G06F2221/2105 , H04L9/004
摘要: A method for protecting a key intended to be used by an electronic circuit in an encryption or decryption algorithm, including the steps of: submitting the key to a first function taking a selection value into account; storing all or part of the result of this function in at least two registers; when the key is called by the algorithm, reading the contents of said registers and submitting them to a second function taking into account all or part of the bits of the registers; and providing the result of the combination as an input for the algorithm, the second function being such that the provided result corresponds to the key.
摘要翻译: 一种用于保护加密或解密算法中由电子电路使用的密钥的方法,包括以下步骤:将密钥提交给考虑到选择值的第一功能; 将该功能的全部或部分结果存储在至少两个寄存器中; 当通过算法调用密钥时,读取所述寄存器的内容并将其提交给考虑了寄存器的全部或部分位的第二功能; 以及将所述组合的结果提供给所述算法的输入,所述第二功能使得所提供的结果对应于所述密钥。
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公开(公告)号:US20110222684A1
公开(公告)日:2011-09-15
申请号:US13030317
申请日:2011-02-18
IPC分类号: H04L9/28
CPC分类号: G06F21/75 , G06F21/72 , G06F2221/2105 , H04L9/004
摘要: A method for protecting a key intended to be used by an electronic circuit in an encryption or decryption algorithm, including the steps of: submitting the key to a first function taking a selection value into account; storing all or part of the result of this function in at least two registers; when the key is called by the algorithm, reading the contents of said registers and submitting them to a second function taking into account all or part of the bits of the registers; and providing the result of the combination as an input for the algorithm, the second function being such that the provided result corresponds to the key.
摘要翻译: 一种用于保护加密或解密算法中由电子电路使用的密钥的方法,包括以下步骤:将密钥提交给考虑到选择值的第一功能; 将该功能的全部或部分结果存储在至少两个寄存器中; 当通过算法调用密钥时,读取所述寄存器的内容并将其提交给考虑了寄存器的全部或部分位的第二功能; 以及将所述组合的结果提供给所述算法的输入,所述第二功能使得所提供的结果对应于所述密钥。
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公开(公告)号:US20110170691A1
公开(公告)日:2011-07-14
申请号:US12917779
申请日:2010-11-02
IPC分类号: H04L9/00
CPC分类号: H04L9/004 , H04L9/0625 , H04L2209/046 , H04L2209/125
摘要: A method for protecting a key implemented, by an electronic circuit, in a symmetrical algorithm for ciphering or deciphering a message, including the steps of: selecting in non-deterministic fashion a pair of different masks from a set of at least four different masks, the masks having the property of representing different bit combinations, at least by pairs of bits; executing the algorithm twice by applying, to the key or to the message, one of the masks of the selected pair at each execution; checking the consistency between the two executions.
摘要翻译: 一种用于保护由电子电路实现的用于加密或解密消息的对称算法的密钥的方法,包括以下步骤:从一组至少四个不同掩码中选择一对不同的掩码, 所述掩模具有表示不同位组合的属性,至少由位组成; 在每次执行时将所选择的一个掩码中的一个应用于密钥或者消息来执行算法两次; 检查两个执行之间的一致性。
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公开(公告)号:US08781124B2
公开(公告)日:2014-07-15
申请号:US12917779
申请日:2010-11-02
CPC分类号: H04L9/004 , H04L9/0625 , H04L2209/046 , H04L2209/125
摘要: A method for protecting a key implemented, by an electronic circuit, in a symmetrical algorithm for ciphering or deciphering a message, including the steps of: selecting in non-deterministic fashion a pair of different masks from a set of at least four different masks, the masks having the property of representing different bit combinations, at least by pairs of bits; executing the algorithm twice by applying, to the key or to the message, one of the masks of the selected pair at each execution; checking the consistency between the two executions.
摘要翻译: 一种用于保护由电子电路实现的用于加密或解密消息的对称算法的密钥的方法,包括以下步骤:从一组至少四个不同掩码中选择一对不同的掩码, 所述掩模具有表示不同位组合的属性,至少由位组成; 在每次执行时将所选择的一个掩码中的一个应用于密钥或者消息来执行算法两次; 检查两个执行之间的一致性。
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公开(公告)号:US08635460B2
公开(公告)日:2014-01-21
申请号:US11304236
申请日:2005-12-14
CPC分类号: H04L9/002 , H04L2209/046 , H04L2209/08
摘要: A method and a circuit for masking a digital word by application of a random bijection, including applying at least one first operation including selecting a non-disjoint subset of the word having its position and size depending on a first random quantity, and assigning to each bit of the subset, the state of the bit having a symmetrical position with respect to the middle of the subset, to obtain a masked digital quantity.
摘要翻译: 一种用于通过应用随机双射屏蔽数字字的方法和电路,包括应用至少一个第一操作,包括根据第一随机数选择具有其位置和大小的字的非不相交子集,并分配给每个 该比特的状态相对于子集的中间具有对称位置,以获得掩蔽的数字量。
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公开(公告)号:US08554813B2
公开(公告)日:2013-10-08
申请号:US12852853
申请日:2010-08-09
IPC分类号: G06F7/58
摘要: A method and a circuit for detecting a loss in the equiprobable character of a first output bit flow originating from at least one first element of normalization of an initial bit flow, including analyzing the flow rate of the normalization element.
摘要翻译: 一种用于检测源自起始位流的归一化的至少一个第一元素的第一输出位流的等能特性损失的方法和电路,包括分析归一化元件的流量。
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公开(公告)号:US08102997B2
公开(公告)日:2012-01-24
申请号:US11547195
申请日:2004-03-29
申请人: Yannick Teglia , Fabrice Romain , Pierre-Yvan Liardet , Pasqualina Fragneto , Fabio Sozzani , Guido Bertoni
发明人: Yannick Teglia , Fabrice Romain , Pierre-Yvan Liardet , Pasqualina Fragneto , Fabio Sozzani , Guido Bertoni
CPC分类号: H04L9/0631 , H04L9/003 , H04L2209/046 , H04L2209/08 , H04L2209/122
摘要: A processor for executing a Rijndeal algorithm which applies a plurality of encryption rounds to a data block array in order to obtain an array of identical size, each round involving a key block array and a data block substitution table, wherein said processor comprises: a first input register (102) containing an input data block column; an output register (111) containing an output data block column or an intermediate block column; a second input register (101) containing a key block column or the intermediate data blocks; a block substitution element (104) receiving the data one block at a time following the selection (103) thereof in the first register and providing, for each block, a column of blocks; an element (109) applying a cyclic permutation to the substitution circuit column blocks; and an Exclusive-OR combination element (110) combining the permutation circuit column blocks with the content of the second register, the result of said combination being loaded into the output register.
摘要翻译: 一种用于执行Rijndeal算法的处理器,该Rijndeal算法将多个加密回合应用于数据块阵列,以便获得相同大小的阵列,每轮涉及密钥块阵列和数据块替换表,其中所述处理器包括:第一 输入寄存器(102),其包含输入数据块列; 包含输出数据块列或中间块列的输出寄存器(111); 包含密钥块列或中间数据块的第二输入寄存器(101); 块替换元件(104)在第一寄存器中的选择(103)之后的时间接收数据一个块,并为每个块提供一列块; 向替代电路列块施加循环置换的元件(109); 以及将置换电路列块与第二寄存器的内容组合的异或组合元件(110),所述组合的结果被加载到输出寄存器中。
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公开(公告)号:US08045712B2
公开(公告)日:2011-10-25
申请号:US11175915
申请日:2005-07-06
申请人: Joan Daemen , Pierre Guillemin , Claude Anguille , Michel Bardouillet , Pierre-Yvan Liardet , Yannick Teglia
发明人: Joan Daemen , Pierre Guillemin , Claude Anguille , Michel Bardouillet , Pierre-Yvan Liardet , Yannick Teglia
IPC分类号: H04L9/00
CPC分类号: G06F12/1408 , H04L9/065 , H04L2209/12
摘要: A method and an element of ciphering by an integrated processor of data to be stored in a memory, including applying a ciphering algorithm which is a function of a key specific to the integrated circuit and of an initialization vector, and of memorizing at least the ciphered data, the initialization vector depending at least on the address of storage of the data in the memory.
摘要翻译: 一种由存储在存储器中的数据的集成处理器进行加密的方法和元件,包括应用作为集成电路特有的密钥和初始化向量的函数的加密算法,以及至少记忆密码 数据,初始化向量至少取决于存储器中数据的存储地址。
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公开(公告)号:US07941639B2
公开(公告)日:2011-05-10
申请号:US11481432
申请日:2006-07-05
申请人: Yannick Teglia , Pierre-Yvan Liardet , Alain Pomet
发明人: Yannick Teglia , Pierre-Yvan Liardet , Alain Pomet
IPC分类号: G06F9/30
CPC分类号: G06F21/77 , G06F11/0757 , G06F21/75 , G06Q20/341 , G07F7/082 , G07F7/084 , G07F7/1008
摘要: A method for protecting the execution of a main program against possible traps, including, on occurrence of an instruction from the main program, starting a time counter of a given count according to next instructions of the main program, and executing, once the counter has reached its count, at least one instruction of a secondary program from which the result of the main program depends.
摘要翻译: 一种用于保护主程序的执行免受可能的陷阱的方法,包括在发生来自主程序的指令时,根据主程序的下一个指令启动给定计数的时间计数器,一旦计数器具有 达到其计数,至少一个辅助程序的指令,主程序的结果从该程序所依赖。
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公开(公告)号:US07734672B2
公开(公告)日:2010-06-08
申请号:US11166565
申请日:2005-06-24
IPC分类号: G06F1/02
CPC分类号: H03K3/84
摘要: A method and a circuit for detecting a possible loss of the equiprobable character of a first output bit flow originating from at least one first normalization element of an initial bit flow, consisting of submitting the initial flow to at least one second normalization element of a nature different from the first one, pairing, bit to bit, the flows originating from the two elements, and checking the equidistribution of the different state pairs.
摘要翻译: 一种用于检测源自初始比特流的至少一个第一归一化元素的第一输出比特流的等能特性的可能损失的方法和电路,其包括将初始流提交给自然的至少一个第二归一化元素 与第一个不同,配对,比特,比特,来自两个元素的流,以及检查不同状态对的等分布。
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