Memory arbiter with latency guarantees for multiple ports
    1.
    发明授权
    Memory arbiter with latency guarantees for multiple ports 有权
    具有延迟保证的多个端口的内存仲裁器

    公开(公告)号:US08745335B2

    公开(公告)日:2014-06-03

    申请号:US13171484

    申请日:2011-06-29

    IPC分类号: G06F12/00 G06F13/16 G06F13/18

    摘要: Memory arbiter with latency guarantees for multiple ports. A method of controlling access to an electronic memory includes measuring a latency value indicative of a time difference between origination of an access request from a port of a plurality of ports and a response from the electronic memory. The method also includes calculating a difference between the latency value for the port and a target value associated with the port. The method further includes calculating a running sum of differences for the port covering each of a plurality of access requests. Further, the method includes determining a delta of a priority value for the port based on the running sum of differences. Moreover, the method includes prioritizing the access by the plurality of ports according to associated priority values.

    摘要翻译: 具有延迟保证的多个端口的内存仲裁器。 控制对电子存储器的访问的方法包括测量表示来自多个端口的接入请求的起始点与来自电子存储器的响应之间的时间差的等待时间值。 该方法还包括计算端口的等待时间值与与端口相关联的目标值之间的差异。 该方法还包括计算覆盖多个访问请求中的每一个的端口的差异的运行总和。 此外,该方法包括基于运行的差异和来确定端口的优先级值的增量。 此外,该方法包括根据相关联的优先级值对多个端口的访问进行优先级排序。

    MEMORY ARBITER WITH LATENCY GUARANTEES FOR MULTIPLE PORTS
    2.
    发明申请
    MEMORY ARBITER WITH LATENCY GUARANTEES FOR MULTIPLE PORTS 有权
    具有多边保证的记忆ARBITER

    公开(公告)号:US20130007386A1

    公开(公告)日:2013-01-03

    申请号:US13171484

    申请日:2011-06-29

    IPC分类号: G06F12/08

    摘要: Memory arbiter with latency guarantees for multiple ports. A method of controlling access to an electronic memory includes measuring a latency value indicative of a time difference between origination of an access request from a port of a plurality of ports and a response from the electronic memory. The method also includes calculating a difference between the latency value for the port and a target value associated with the port. The method further includes calculating a running sum of differences for the port covering each of a plurality of access requests. Further, the method includes determining a delta of a priority value for the port based on the running sum of differences. Moreover, the method includes prioritizing the access by the plurality of ports according to associated priority values.

    摘要翻译: 具有延迟保证的多个端口的内存仲裁器。 控制对电子存储器的访问的方法包括测量表示来自多个端口的接入请求的起始点与来自电子存储器的响应之间的时间差的等待时间值。 该方法还包括计算端口的等待时间值与与端口相关联的目标值之间的差异。 该方法还包括计算覆盖多个访问请求中的每一个的端口的差异的运行总和。 此外,该方法包括基于运行的差异和来确定端口的优先级值的增量。 此外,该方法包括根据相关联的优先级值对多个端口的访问进行优先级排序。

    DATA PROCESSING SYSTEM COMPRISING A MONITOR
    3.
    发明申请
    DATA PROCESSING SYSTEM COMPRISING A MONITOR 有权
    包含监视器的数据处理系统

    公开(公告)号:US20110179316A1

    公开(公告)日:2011-07-21

    申请号:US13120087

    申请日:2009-09-22

    IPC分类号: G06F11/30

    摘要: A data processing system 100 comprising a monitor 120 is provided and corresponding system-on-chip, method for monitoring and computer program product. The data processing system comprises multiple processing devices 104, 106, 116, 116 and a monitor 120. The monitor is configured to monitor characteristics of the data streams 102, 112, occurring among the plurality of data processing devices. The monitor comprises a means to determine whether a system characteristic substantially deviates from an expected system characteristic and to raise an anomaly signal if so. The system characteristic depends on the first characteristic and the second characteristic. In this way the monitor increases robustness by monitoring for problems related to deviations in the relation between multiple data streams.

    摘要翻译: 提供了包括监视器120的数据处理系统100和相应的系统级芯片监视方法和计算机程序产品。 数据处理系统包括多个处理设备104,106,116,116和监视器120.监视器被配置为监视在多个数据处理设备之间发生的数据流102,112的特性。 监视器包括一种用于确定系统特性是否显着偏离预期系统特性的装置,如果是,则产生异常信号。 系统特性取决于第一特性和第二特性。 以这种方式,监视器通过监视与多个数据流之间的关系的偏差相关的问题来增强鲁棒性。

    Data processing system comprising a monitor
    4.
    发明授权
    Data processing system comprising a monitor 有权
    数据处理系统包括监视器

    公开(公告)号:US08560741B2

    公开(公告)日:2013-10-15

    申请号:US13120087

    申请日:2009-09-22

    IPC分类号: G06F3/00

    摘要: A data processing system 100 comprising a monitor 120 is provided and corresponding system-on-chip, method for monitoring and computer program product. The data processing system comprises multiple processing devices 104, 106, 116, 116 and a monitor 120. The monitor is configured to monitor characteristics of the data streams 102, 112, occurring among the plurality of data processing devices. The monitor comprises a means to determine whether a system characteristic substantially deviates from an expected system characteristic and to raise an anomaly signal if so. The system characteristic depends on the first characteristic and the second characteristic. In this way the monitor increases robustness by monitoring for problems related to deviations in the relation between multiple data streams.

    摘要翻译: 提供了包括监视器120的数据处理系统100和相应的系统级芯片监视方法和计算机程序产品。 数据处理系统包括多个处理设备104,106,116,116和监视器120.监视器被配置为监视在多个数据处理设备之间发生的数据流102,112的特性。 监视器包括一种用于确定系统特性是否显着偏离预期系统特性的装置,如果是,则产生异常信号。 系统特性取决于第一特性和第二特性。 以这种方式,监视器通过监视与多个数据流之间的关系的偏差相关的问题来增强鲁棒性。