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1.发明申请公开(公告)号：US20050123029A1
公开(公告)日：2005-06-09
申请号：US10975104
申请日：2004-10-28
摘要： Provided are a method and system for a module for a cable modem termination system. The module includes a digital modulator configured to block up-convert a plurality of digital channels and a digital to analog converter coupled, at least indirectly, to an output of the digital modulator to convert the digital channels to an analog format.
摘要翻译： 提供一种用于电缆调制解调器终端系统的模块的方法和系统。 该模块包括数字调制器，被配置为阻止多个数字信道的上变换和至少间接耦合到数字调制器的输出的数模转换器，以将数字信道转换为模拟格式。
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2.发明申请Method and system for time interleaved digital to analog conversion for a cable modem 有权用于电缆调制解调器的时间交织数模转换的方法和系统公开(公告)号：US20060098823A1
公开(公告)日：2006-05-11
申请号：US10975106
申请日：2004-10-28
申请人： Arnoldus Venes , Kevin Miller , Pieter Vorenkamp
发明人： Arnoldus Venes , Kevin Miller , Pieter Vorenkamp
IPC分类号： H04N7/167
CPC分类号： H04N21/6118 , H04N7/17309 , H04N21/6168
摘要： Provided is a transmitter in a communications system including a plurality of digital to analog converters. Also included is a plurality of clocks, each being communicably coupled to a corresponding one of the digital to analog converters.
摘要翻译： 提供了一种包括多个数模转换器的通信系统中的发射机。 还包括多个时钟，每个时钟可通信地耦合到数模转换器中相应的一个。
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公开(公告)号：US20110304394A1
公开(公告)日：2011-12-15
申请号：US12961151
申请日：2010-12-06
IPC分类号： H03F3/45
CPC分类号： H03G3/30 , H03F1/34 , H03F3/195 , H03F3/24 , H03F3/45188 , H03F3/45192 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03F2200/513 , H03F2203/45644 , H03G1/0029 , H04B2001/0433
摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.
摘要翻译： 综合通信系统。 包括具有设置在基板上的接收器的基板，用于将接收信号转换成IF信号。 耦合到VGA用于低电压应用并耦合到接收机处理IF信号。 VGA包括具有第一组差分晶体管组和第二组差分晶体管组的存储体对。 银行对并行交叉耦合，IF信号被施加到从用于在一定范围的输入电压上控制存储体对的跨导输出增益的控制信号去耦的存储体对。 数字IF解调器设置在衬底上并耦合到用于低电压应用的VGA，用于将IF信号转换成解调的基带信号。 并且发射机设置在与接收器协作操作的基板上以建立双向通信路径。
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公开(公告)号：US20070105504A1
公开(公告)日：2007-05-10
申请号：US11516718
申请日：2006-09-07
申请人： Pieter Vorenkamp , Myles Wakayama , Steven Jaffe , Frank Carr , Arnoldus Venes , Peter Kinget , Daniel Marz , Thinh Nguyen
发明人： Pieter Vorenkamp , Myles Wakayama , Steven Jaffe , Frank Carr , Arnoldus Venes , Peter Kinget , Daniel Marz , Thinh Nguyen
IPC分类号： H04B1/38
摘要： An integrated communications system. A substrate having a receiver disposed on the substrate for converting a received signal to an IF signal, a digital IF demodulator disposed on the substrate and coupled to the receiver for converting the IF signal to a demodulated baseband signal, and a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.
摘要翻译： 综合通信系统。 一种衬底，具有设置在衬底上的接收器，用于将接收信号转换成IF信号;数字IF解调器，设置在衬底上并耦合到接收器，用于将IF信号转换成解调的基带信号;以及发射器，设置在衬底上 与接收机合作建立双向通信路径。
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公开(公告)号：US07106388B2
公开(公告)日：2006-09-12
申请号：US09739349
申请日：2000-12-15
申请人： Pieter Vorenkamp , Myles H. Wakayama , Steven Jaffe , Frank Carr , Arnoldus Venes , Peter R. Kinget , Daniel J. Marz , Thinh Nguyen
发明人： Pieter Vorenkamp , Myles H. Wakayama , Steven Jaffe , Frank Carr , Arnoldus Venes , Peter R. Kinget , Daniel J. Marz , Thinh Nguyen
IPC分类号： H04N5/455
摘要： An integrated communications system. A substrate having a receiver disposed on the substrate for converting a received signal to an IF signal, a digital IF demodulator disposed on the substrate and coupled to the receiver for converting the IF signal to a demodulated baseband signal, and a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.
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公开(公告)号：US07848724B2
公开(公告)日：2010-12-07
申请号：US11432435
申请日：2006-05-12
CPC分类号： H03G3/30 , H03F1/34 , H03F3/195 , H03F3/24 , H03F3/45188 , H03F3/45192 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03F2200/513 , H03F2203/45644 , H03G1/0029 , H04B2001/0433
摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.
摘要翻译： 综合通信系统。 包括具有设置在基板上的接收器的基板，用于将接收信号转换成IF信号。 耦合到VGA用于低电压应用并耦合到接收机处理IF信号。 VGA包括具有第一组差分晶体管组和第二组差分晶体管组的存储体对。 银行对并行交叉耦合，IF信号被施加到从用于在一定范围的输入电压上控制存储体对的跨导输出增益的控制信号去耦的存储体对。 数字IF解调器设置在衬底上并耦合到用于低电压应用的VGA，用于将IF信号转换成解调的基带信号。 并且发射机设置在与接收器协作操作的基板上以建立双向通信路径。
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公开(公告)号：US06684065B2
公开(公告)日：2004-01-27
申请号：US09747159
申请日：2000-12-20
IPC分类号： H04B106
CPC分类号： H03G3/30 , H03F1/34 , H03F3/195 , H03F3/24 , H03F3/45188 , H03F3/45192 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03F2200/513 , H03F2203/45644 , H03G1/0029 , H04B2001/0433
摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.
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公开(公告)号：US08711288B2
公开(公告)日：2014-04-29
申请号：US11516718
申请日：2006-09-07
申请人： Pieter Vorenkamp , Myles H. Wakayama , Steven Jaffe , Frank Carr , Arnoldus Venes , Peter R. Kinget , Daniel J. Marz , Thinh Nguyen
发明人： Pieter Vorenkamp , Myles H. Wakayama , Steven Jaffe , Frank Carr , Arnoldus Venes , Peter R. Kinget , Daniel J. Marz , Thinh Nguyen
IPC分类号： H04N5/44
摘要： An integrated communications system. A substrate having a receiver disposed on the substrate for converting a received signal to an IF signal, a digital IF demodulator disposed on the substrate and coupled to the receiver for converting the IF signal to a demodulated baseband signal, and a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.
摘要翻译： 综合通信系统。 一种衬底，具有设置在衬底上的接收器，用于将接收信号转换成IF信号;数字IF解调器，设置在衬底上并耦合到接收器，用于将IF信号转换成解调的基带信号;以及发射器，设置在衬底上 与接收方合作建立双向通信路径。
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公开(公告)号：US08489052B2
公开(公告)日：2013-07-16
申请号：US12961151
申请日：2010-12-06
CPC分类号： H03G3/30 , H03F1/34 , H03F3/195 , H03F3/24 , H03F3/45188 , H03F3/45192 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03F2200/513 , H03F2203/45644 , H03G1/0029 , H04B2001/0433
摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.
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公开(公告)号：US07076226B2
公开(公告)日：2006-07-11
申请号：US10747124
申请日：2003-12-30
CPC分类号： H03G3/30 , H03F1/34 , H03F3/195 , H03F3/24 , H03F3/45188 , H03F3/45192 , H03F2200/294 , H03F2200/331 , H03F2200/372 , H03F2200/513 , H03F2203/45644 , H03G1/0029 , H04B2001/0433
摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.
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