公开(公告)号：US07848724B2

公开(公告)日：2010-12-07

申请号：US11432435

申请日：2006-05-12

申请人： Klaas Bult ,  Rudy van de Plassche ,  Pieter Vorenkamp ,  Arnoldus Venes

发明人： Klaas Bult ,  Rudy van de Plassche ,  Pieter Vorenkamp ,  Arnoldus Venes

IPC分类号： H04B1/06 ,  H03F3/45

CPC分类号： H03G3/30 ,  H03F1/34 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45188 ,  H03F3/45192 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/372 ,  H03F2200/513 ,  H03F2203/45644 ,  H03G1/0029 ,  H04B2001/0433

摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

摘要翻译： 综合通信系统。 包括具有设置在基板上的接收器的基板，用于将接收信号转换成IF信号。 耦合到VGA用于低电压应用并耦合到接收机处理IF信号。 VGA包括具有第一组差分晶体管组和第二组差分晶体管组的存储体对。 银行对并行交叉耦合，IF信号被施加到从用于在一定范围的输入电压上控制存储体对的跨导输出增益的控制信号去耦的存储体对。 数字IF解调器设置在衬底上并耦合到用于低电压应用的VGA，用于将IF信号转换成解调的基带信号。 并且发射机设置在与接收器协作操作的基板上以建立双向通信路径。

公开(公告)号：US20080101592A1

公开(公告)日：2008-05-01

申请号：US11590202

申请日：2006-10-30

申请人： Jiangfeng Wu ,  Tianwei Li ,  Arnoldus Venes

发明人： Jiangfeng Wu ,  Tianwei Li ,  Arnoldus Venes

IPC分类号： H04M1/00 ,  H04M9/00

CPC分类号： H04M11/062 ,  H04L25/028 ,  H04L25/0298

摘要： A line driver comprises a driving amplifier receiving an input of the line driver, a current sense resistor connected between the driving amplifier output and the line driver output, and a feedback amplifier sensing the voltage across the current sense resistor and providing a corresponding feedback voltage that is proportional to the output current to the driving amplifier, thereby determining an output impedance at the line driver output. Precise output impedance can be realized by using a high precision resistor as the current sense resistor, and using resistive feedback amplifiers with accurate gains as the driving and feedback amplifiers. The resistance of the current sense resistor can be substantially less than the line driver output impedance, and the driving amplifier output voltage swing can be substantially less than twice the line driver output voltage swing.

摘要翻译： 线路驱动器包括接收线路驱动器的输入的驱动放大器，连接在驱动放大器输出和线路驱动器输出之间的电流检测电阻器，以及感测电流检测电阻器两端的电压的反馈放大器，并提供相应的反馈电压， 与驱动放大器的输出电流成比例，从而确定线路驱动器输出端的输出阻抗。 可以通过使用高精度电阻器作为电流检测电阻器，并使用具有精确增益的电阻反馈放大器作为驱动和反馈放大器来实现精确的输出阻抗。 电流检测电阻器的电阻可以显着小于线路驱动器输出阻抗，并且驱动放大器输出电压摆幅可以显着小于线路驱动器输出电压摆幅的两倍。

公开(公告)号：US06972625B2

公开(公告)日：2005-12-06

申请号：US10823543

申请日：2004-04-14

申请人： Thinh Cat Nguyen ,  Arnoldus Venes

发明人： Thinh Cat Nguyen ,  Arnoldus Venes

IPC分类号： H03F1/32 ,  H03F3/45 ,  H03G1/00

CPC分类号： H03F3/45197 ,  H03F1/3211 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/372 ,  H03G1/0029

摘要： Continuously tuning a transconductance. Coupling a degeneration resistance from a first source of a first transistor in a differential pair of transistors to a second source of a second transistor in the differential pair of transistors. Applying a second variable degeneration resistance in parallel to the first degeneration resistance in response to the application of a first variable control voltage. And applying a third variable degeneration resistance in parallel to the first degeneration resistance and the second degeneration resistance in response to the application of a second variable control voltage having a fixed voltage offset from the first variable control voltage.

摘要翻译： 不断调整跨导。 将差分对晶体管中的第一晶体管的第一源极的退化电阻耦合到差分晶体管对中的第二晶体管的第二源极。 响应于施加第一可变控制电压，施加与第一退化电阻并联的第二变量退化电阻。 以及响应于施加了具有从所述第一可变控制电压偏移的固定电压的第二可变控制电压，施加与所述第一退化电阻和所述第二退化电阻并联的第三变量退化电阻。

公开(公告)号：US06684065B2

公开(公告)日：2004-01-27

申请号：US09747159

申请日：2000-12-20

申请人： Klaas Bult ,  Rudy van de Plassche ,  Pieter Vorenkamp ,  Arnoldus Venes

发明人： Klaas Bult ,  Rudy van de Plassche ,  Pieter Vorenkamp ,  Arnoldus Venes

IPC分类号： H04B106

CPC分类号： H03G3/30 ,  H03F1/34 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45188 ,  H03F3/45192 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/372 ,  H03F2200/513 ,  H03F2203/45644 ,  H03G1/0029 ,  H04B2001/0433

摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

公开(公告)号：US08711288B2

公开(公告)日：2014-04-29

申请号：US11516718

申请日：2006-09-07

申请人： Pieter Vorenkamp ,  Myles H. Wakayama ,  Steven Jaffe ,  Frank Carr ,  Arnoldus Venes ,  Peter R. Kinget ,  Daniel J. Marz ,  Thinh Nguyen

发明人： Pieter Vorenkamp ,  Myles H. Wakayama ,  Steven Jaffe ,  Frank Carr ,  Arnoldus Venes ,  Peter R. Kinget ,  Daniel J. Marz ,  Thinh Nguyen

IPC分类号： H04N5/44

CPC分类号： H04N5/455 ,  H03D7/16 ,  H03J3/18 ,  H04N5/44

摘要： An integrated communications system. A substrate having a receiver disposed on the substrate for converting a received signal to an IF signal, a digital IF demodulator disposed on the substrate and coupled to the receiver for converting the IF signal to a demodulated baseband signal, and a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

摘要翻译： 综合通信系统。 一种衬底，具有设置在衬底上的接收器，用于将接收信号转换成IF信号;数字IF解调器，设置在衬底上并耦合到接收器，用于将IF信号转换成解调的基带信号;以及发射器，设置在衬底上 与接收方合作建立双向通信路径。

公开(公告)号：US07129871B1

公开(公告)日：2006-10-31

申请号：US11214798

申请日：2005-08-31

申请人： Arnoldus Venes ,  Yonghua Cong

发明人： Arnoldus Venes ,  Yonghua Cong

IPC分类号： H03M1/00

CPC分类号： H03M1/1061 ,  H03F3/45089 ,  H03F3/45188 ,  H03F3/72 ,  H03F2203/45641 ,  H03M1/742

摘要： A wide gain range current digital-to-analog converter (DAC) is presented that includes a unit current cell having a current source module biased by a current source voltage bias, a differential switch module, a main cascode module biased by a first bias voltage and an attenuation cascode module biased by a second bias voltage, configured such that a particular current gain range is obtained at the main cascode module output when a unit current cell current is at or above a current threshold. The output current at the attenuation cascode module output can be input into a current attenuator when the unit current cell current is below the current threshold to obtain additional current gain range. The current attenuator can include a plurality of attenuator cells that can be programmed to a desired level of current gain in linear decibels or linear step intervals. Smaller step sizes can be obtained by programming a current source within the step intervals.

摘要翻译： 提出了一种宽增益范围的当前数模转换器（DAC），其包括具有由电流源电压偏置偏置的电流源模块的单位电流单元，差分开关模块，被第一偏置电压 以及由第二偏置电压偏置的衰减级联模块模块，其被配置为使得当单位电流单元电流处于或高于当前阈值时，在主级联模块输出处获得特定的电流增益范围。 当单位电流单元电流低于电流阈值时，衰减级联模块输出端的输出电流可以输入到电流衰减器，以获得额外的电流增益范围。 电流衰减器可以包括多个衰减器单元，其可以以线性分贝或线性步进间隔被编程到期望的电流增益水平。 可以通过在步进间隔内编程电流源来获得较小的步长。

公开(公告)号：US20060229046A1

公开(公告)日：2006-10-12

申请号：US11432435

申请日：2006-05-12

申请人： Klaas Bult ,  Rudy Plassche ,  Arnoldus Venes

发明人： Klaas Bult ,  Rudy Plassche ,  Arnoldus Venes

IPC分类号： H04B1/06 ,  H04B7/00

CPC分类号： H03G3/30 ,  H03F1/34 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45188 ,  H03F3/45192 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/372 ,  H03F2200/513 ,  H03F2203/45644 ,  H03G1/0029 ,  H04B2001/0433

摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

公开(公告)号：US20060098823A1

公开(公告)日：2006-05-11

申请号：US10975106

申请日：2004-10-28

申请人： Arnoldus Venes ,  Kevin Miller ,  Pieter Vorenkamp

发明人： Arnoldus Venes ,  Kevin Miller ,  Pieter Vorenkamp

IPC分类号： H04N7/167

CPC分类号： H04N21/6118 ,  H04N7/17309 ,  H04N21/6168

摘要： Provided is a transmitter in a communications system including a plurality of digital to analog converters. Also included is a plurality of clocks, each being communicably coupled to a corresponding one of the digital to analog converters.

摘要翻译： 提供了一种包括多个数模转换器的通信系统中的发射机。 还包括多个时钟，每个时钟可通信地耦合到数模转换器中相应的一个。

公开(公告)号：US20110304394A1

公开(公告)日：2011-12-15

申请号：US12961151

申请日：2010-12-06

申请人： Klaas Bult ,  Rudy van de Plassche ,  Pieter Vorenkamp ,  Arnoldus Venes

发明人： Klaas Bult ,  Rudy van de Plassche ,  Pieter Vorenkamp ,  Arnoldus Venes

IPC分类号： H03F3/45

CPC分类号： H03G3/30 ,  H03F1/34 ,  H03F3/195 ,  H03F3/24 ,  H03F3/45188 ,  H03F3/45192 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/372 ,  H03F2200/513 ,  H03F2203/45644 ,  H03G1/0029 ,  H04B2001/0433

摘要： An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

摘要翻译： 综合通信系统。 包括具有设置在基板上的接收器的基板，用于将接收信号转换成IF信号。 耦合到VGA用于低电压应用并耦合到接收机处理IF信号。 VGA包括具有第一组差分晶体管组和第二组差分晶体管组的存储体对。 银行对并行交叉耦合，IF信号被施加到从用于在一定范围的输入电压上控制存储体对的跨导输出增益的控制信号去耦的存储体对。 数字IF解调器设置在衬底上并耦合到用于低电压应用的VGA，用于将IF信号转换成解调的基带信号。 并且发射机设置在与接收器协作操作的基板上以建立双向通信路径。

公开(公告)号：US20070105504A1

公开(公告)日：2007-05-10

申请号：US11516718

申请日：2006-09-07

申请人： Pieter Vorenkamp ,  Myles Wakayama ,  Steven Jaffe ,  Frank Carr ,  Arnoldus Venes ,  Peter Kinget ,  Daniel Marz ,  Thinh Nguyen

发明人： Pieter Vorenkamp ,  Myles Wakayama ,  Steven Jaffe ,  Frank Carr ,  Arnoldus Venes ,  Peter Kinget ,  Daniel Marz ,  Thinh Nguyen

IPC分类号： H04B1/38

CPC分类号： H04N5/455 ,  H03D7/16 ,  H03J3/18 ,  H04N5/44

摘要： An integrated communications system. A substrate having a receiver disposed on the substrate for converting a received signal to an IF signal, a digital IF demodulator disposed on the substrate and coupled to the receiver for converting the IF signal to a demodulated baseband signal, and a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

摘要翻译： 综合通信系统。 一种衬底，具有设置在衬底上的接收器，用于将接收信号转换成IF信号;数字IF解调器，设置在衬底上并耦合到接收器，用于将IF信号转换成解调的基带信号;以及发射器，设置在衬底上 与接收机合作建立双向通信路径。