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    CIRCUITS FOR WIRELESS COMMUNICATION ON MULTIPLE FREQUENCY BANDS
    2.
    发明申请
    CIRCUITS FOR WIRELESS COMMUNICATION ON MULTIPLE FREQUENCY BANDS 审中-公开

    公开(公告)号：US20180287559A1

    公开(公告)日：2018-10-04

    申请号：US15765795

    申请日：2016-10-04

    申请人： Jianxun Zhu ,  Peter R. Kinget

    发明人： Jianxun Zhu ,  Peter R. Kinget

    IPC分类号： H03C3/40 ,  H03D7/16 ,  H03F3/19 ,  H03F3/24

    摘要： Circuit for wireless communication are provided, the circuits comprising: a first quadrature hybrid having a first in port, a first iso port, a first cpl port, and a first thru port; a first mixer having a first input coupled to the first cpl port and having an output; a second mixer have a first input coupled to the first cpl port and having an output; a third mixer having a first input coupled to the first thru port and having an output; a fourth mixer having a first input coupled to the first thru port and having an output; and a first complex combiner having inputs coupled to the output of the first mixer, the output of the second mixer, the output of the third mixer, and the output of the fourth mixer that provides first I and Q outputs based the output of the first mixer and the output of the second mixer.

    CIRCUITS FOR LOW NOISE AMPLIFIERS
    4.
    发明申请
    CIRCUITS FOR LOW NOISE AMPLIFIERS 有权
    低噪声放大器电路

    公开(公告)号：US20160322943A1

    公开(公告)日：2016-11-03

    申请号：US15107863

    申请日：2014-12-24

    申请人： Baradwaj VIGRAHAM ,  Peter R. KINGET

    发明人： Baradwaj VIGRAHAM ,  Peter R. KINGET

    IPC分类号： H03F3/193

    CPC分类号： H03F3/193 ,  H03F1/565 ,  H03F3/19 ,  H03F3/211 ,  H03F2200/222 ,  H03F2200/294 ,  H03F2200/541 ,  H03F2200/78 ,  H03H11/28

    摘要： Low noise amplifiers (LNAs) are provided, the LNAs comprising: a common gate matching network; a capacitord; a resistord; a coild, wherein a side1 of coild is coupled to a side1 of capacitord, a side1 of resistord, and a V+ and a side2 of the coild is coupled to a side2 of capacitord, a side2 of resistord, and a network input; a capacitors; a resistors; a coils, wherein a side1 of coils is coupled to an LNA input, a side1 of capacitors, a side1 of resistors, and a network output and a side2 of coils is coupled to a side2 of the capacitors, a side2 of resistors, and ground; and an output coil that is magnetically coupled to coild and coils and having a side1 coupled to a first terminal of an LNA output and a side2 coupled to a second terminal of the LNA output.

    摘要翻译： 提供低噪声放大器（LNA），LNA包括：公共门匹配网络; 一个电容; 抵抗者 coild，其中coild的side1耦合到电容的一侧，电阻的一侧，以及电阻的V +和侧面2耦合到电容的侧面2，电阻的侧面2和网络输入; 电容器 电阻器 线圈，其中线圈的侧面1耦合到LNA输入，电容器的侧面1，电阻器的侧面1以及网络输出端和线圈的侧面2耦合到电容器的侧面2，电阻器的侧面2和接地 ; 以及输出线圈，其被磁耦合到共线圈和线圈，并且具有耦合到LNA输出的第一端子的侧面1和耦合到LNA输出端的第二端子的侧面2。

    SYSTEMS AND METHODS FOR REDUCING CIRCUIT AREA
    5.
    发明申请
    SYSTEMS AND METHODS FOR REDUCING CIRCUIT AREA 有权
    减少电路面积的系统和方法

    公开(公告)号：US20080180187A1

    公开(公告)日：2008-07-31

    申请号：US11943287

    申请日：2007-11-20

    申请人： Peter R. KINGET ,  Frank ZHANG

    发明人： Peter R. KINGET ,  Frank ZHANG

    IPC分类号： G01D5/20 ,  H01F5/00

    CPC分类号： H01L23/5227 ,  H01F2017/0046 ,  H01F2017/008 ,  H01F2021/125 ,  H01L27/0207 ,  H01L27/0727 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods and systems are provided for reducing circuit area. Some embodiments provide electronic devices including an inductor formed from a path having two ends that loops substantially in a plane around a center area, wherein the path crosses itself at least two points and wherein the path defines an outer boundary of the inductor; and a circuit that is located within the outer boundary of the inductor and substantially within or adjacent to the plane. Other embodiments provide electronic devices including an inductor formed from a path having two ends that loops substantially in a plane around a center area, wherein the path defines an outer boundary of the inductor; and a circuit that is located within the outer boundary of the inductor and substantially within or adjacent to the plane, and wherein the circuit comprises a signal path that is rake-shaped and crosses the path of the inductor at substantially perpendicular angles.

    摘要翻译： 提供了减少电路面积的方法和系统。 一些实施例提供了电子设备，其包括由具有两个端部的路径形成的电感器，所述两个端部基本围绕围绕中心区域的平面环绕，其中所述路径在至少两个点处与其自身交叉，并且其中所述路径限定所述电感器的外边界; 以及位于电感器的外边界内并且基本上在平面内或与平面相邻的电路。 其他实施例提供了电子设备，其包括由具有两个端部的路径形成的电感器，所述两个端部基本围绕围绕中心区域的平面环绕，其中所述路径限定所述电感器的外边界; 以及位于电感器的外边界内并且基本上在该平面内或与该平面相邻的电路，并且其中该电路包括一个信号路径，该信号路径是耙状的并以大致垂直的角度穿过该电感器的路径。

    CIRCUITS FOR INTERMEDIATE-FREQUENCY-FILTERLESS, DOUBLE-CONVERSION RECEIVERS
    6.
    发明申请
    CIRCUITS FOR INTERMEDIATE-FREQUENCY-FILTERLESS, DOUBLE-CONVERSION RECEIVERS 有权

    公开(公告)号：US20210258030A1

    公开(公告)日：2021-08-19

    申请号：US17176349

    申请日：2021-02-16

    申请人： Guoxiang Han ,  Peter R. Kinget ,  Tanbir Haque

    发明人： Guoxiang Han ,  Peter R. Kinget ,  Tanbir Haque

    IPC分类号： H04B1/12 ,  H04B1/30 ,  H04B1/18

    摘要： Circuits for a receiver, comprising: M first mixers that each receive an input signal, that are each clocked by a different phase of a first common clock frequency, and that each provide an output, wherein M is a count of the first mixers; and M sets of N second mixers, wherein N is a count of the second mixers in each of the M sets, wherein each second mixer in each set of N second mixers receives as an input the output of a corresponding one of the M first mixers, wherein each of the N second mixers in each of the M sets are clocked by a different phase of a second common clock frequency, and wherein each of the second mixers has an output.

    Circuits for continuous-time clockless analog correlators
    7.
    发明授权
    Circuits for continuous-time clockless analog correlators 有权

    公开(公告)号：US11050457B2

    公开(公告)日：2021-06-29

    申请号：US16889716

    申请日：2020-06-01

    申请人： Vivek Mangal ,  Peter R. Kinget

    发明人： Vivek Mangal ,  Peter R. Kinget

    IPC分类号： H04B1/00 ,  H04B1/709 ,  H03D7/16 ,  H03M1/80 ,  H03M1/46

    摘要： Circuits for continuous-time analog correlators are provided, comprising: a first VCO that receives an input signal and that outputs a first pulse frequency modulated (PFM) output signal; a second VCO that receives a reference signal and that outputs a second PFM output signal; a first phase frequency detector (PFD) that receives the first PFM output signal and the second PFM output signal and that produces a first PFD output signal; a first delay cell that receives the first PFM output signal and that produces a first delayed signal (DS); a second delay cell that receives the second PFM output signal and that produces a second DS; a second PFD that receives the first DS and the second DS and that produces a second PFD output signal; and a capacitor-digital-to-analog converter (capacitor-DAC) that receives the first PFD output signal and the second PFD output signal and that produces a correlator output.

    Circuits for modulated-mixer-clock multi-branch receivers
    9.
    发明授权
    Circuits for modulated-mixer-clock multi-branch receivers 有权

    公开(公告)号：US10819284B2

    公开(公告)日：2020-10-27

    申请号：US16579782

    申请日：2019-09-23

    申请人： Guoxiang Han ,  Tanbir Haque ,  Peter R. Kinget

    发明人： Guoxiang Han ,  Tanbir Haque ,  Peter R. Kinget

    IPC分类号： H04B1/10 ,  H03D7/14 ,  H03F3/193 ,  H03F3/45 ,  H03F1/26 ,  H04B1/16 ,  H03F1/02

    摘要： Circuits comprising: a plurality of LNTA branches, each comprising: a cascode common-source (CCS) LNTA, a plurality of passive mixers (PMs), and a plurality of baseband two-stage Miller compensated TIAs (BB2S-TIAs); a plurality of mixer-first branches, each comprising: a plurality of RF switches, a plurality of baseband folded-cascode TIAs (BBFC-TIAs), and a plurality of Cherry-Hooper amplifiers, wherein an input to each of the BBFC-TIAs is provided by an output of at least one of the RF switches, and an input to each of the amplifiers is provided by an output of a corresponding one of the BBFC-TIAs; a first plurality of clock modulators that provide first non-overlapping modulated clocks that are provided to an input of the PMs; and a second plurality of clock modulators that provide a plurality of tri-level modulated mixer clocks that control the switching of the RF switches.