公开(公告)号：US20090164699A1

公开(公告)日：2009-06-25

申请号：US12296150

申请日：2007-02-15

申请人： Pim Tuyls ,  Maarten Vertregt ,  Hans De Jong ,  Frans List ,  Mathias Wagner ,  Frank Zachariasse ,  Arjan Mels

发明人： Pim Tuyls ,  Maarten Vertregt ,  Hans De Jong ,  Frans List ,  Mathias Wagner ,  Frank Zachariasse ,  Arjan Mels

IPC分类号： G06F12/00

CPC分类号： G06F21/556 ,  H04L9/0877

摘要： It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory (102), which data storage cells (102a) are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and generating an electronic key by using the logical state of the predetermined data storage cells (102a). Preferably, the predetermined data storage cells (102a) are randomly distributed within the volatile memory (102). It is further described an integrated circuit (100) for providing an electronic key. The integrated circuit (100) comprises a volatile memory (102) comprising predetermined data storage cells (102a), which are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and a non-volatile memory (104) having information stored upon regarding the predetermined data storage cells (102a). Thereby, the electronic key is defined by the corresponding logical states of the predetermined data storage cells (102a).

摘要翻译： 描述了在包括易失性存储器（102）和非易失性存储器（104）的集成电路（100）内提供电子钥匙的方法。 所描述的包括启动集成电路（100），读取分配给易失性存储器（102）的预定数据存储单元（102a）的逻辑状态，哪个数据存储单元（102a）的特征在于具有多个启动过程 它们分别采用相同的逻辑状态，并且通过使用预定数据存储单元（1022）的逻辑状态来生成电子密钥。 优选地，预定数据存储单元（102a）被随机分布在易失性存储器（102）内。 进一步描述了用于提供电子钥匙的集成电路（100）。 集成电路（100）包括包括预定数据存储单元（102）的易失性存储器（102），其特征在于，通过多个启动过程，它们分别采用相同的逻辑状态，以及非易失性存储器（104） 具有关于预定数据存储单元（102a）存储的信息。 由此，电子密钥由预定数据存储单元（102a）的相应逻辑状态定义。

公开(公告)号：US08199912B2

公开(公告)日：2012-06-12

申请号：US12296150

申请日：2007-02-15

申请人： Pim Tuyls ,  Maarten Vertregt ,  Hans De Jong ,  Frans List ,  Mathias Wagner ,  Frank Zachariasse ,  Arjan Mels

发明人： Pim Tuyls ,  Maarten Vertregt ,  Hans De Jong ,  Frans List ,  Mathias Wagner ,  Frank Zachariasse ,  Arjan Mels

IPC分类号： H04L9/00

CPC分类号： G06F21/556 ,  H04L9/0877

摘要： It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory (102), which data storage cells (102a) are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and generating an electronic key by using the logical state of the predetermined data storage cells (102a). Preferably, the predetermined data storage cells (102a) are randomly distributed within the volatile memory (102). It is further described an integrated circuit (100) for providing an electronic key. The integrated circuit (100) comprises a volatile memory (102) comprising predetermined data storage cells (102a), which are characterized that with a plurality of start up procedures they respectively adopt the same logical state, and a non-volatile memory (104) having information stored upon regarding the predetermined data storage cells (102a). Thereby, the electronic key is defined by the corresponding logical states of the predetermined data storage cells (102a).

摘要翻译： 描述了在包括易失性存储器（102）和非易失性存储器（104）的集成电路（100）内提供电子钥匙的方法。 所描述的包括启动集成电路（100），读取分配给易失性存储器（102）的预定数据存储单元（102a）的逻辑状态，哪个数据存储单元（102a）的特征在于具有多个启动过程 它们分别采用相同的逻辑状态，并且通过使用预定数据存储单元（1022）的逻辑状态来生成电子密钥。 优选地，预定数据存储单元（102a）被随机分布在易失性存储器（102）内。 进一步描述了用于提供电子钥匙的集成电路（100）。 集成电路（100）包括包括预定数据存储单元（102）的易失性存储器（102），其特征在于，通过多个启动过程，它们分别采用相同的逻辑状态，以及非易失性存储器（104） 具有关于预定数据存储单元（102a）存储的信息。 由此，电子密钥由预定数据存储单元（102a）的相应逻辑状态定义。

公开(公告)号：US08198641B2

公开(公告)日：2012-06-12

申请号：US12527551

申请日：2008-02-13

申请人： Frank Zachariasse

发明人： Frank Zachariasse

IPC分类号： H01L33/00

CPC分类号： H01L23/576 ,  G06F21/77 ,  G06F21/86 ,  G06F2221/2121 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/13091 ,  H04L9/3278 ,  H01L2924/00014 ,  H01L2924/00

摘要： A tamper-resistant semiconductor device (5;20;30;40;50;60) which includes a plurality of electronic circuits formed on a circuitry side (6) of a substrate (7) having an opposite side which is a backside (8) of the semiconductor device, and comprises at least one light-emitting device (9a-f;21) and at least one light-sensing device (10a-f;22a-b) provided on the circuitry side (6) of the semiconductor device. The light-emitting device (9a-f;21) is arranged to emit light, including a wavelength range for which the substrate (7) is transparent, into the substrate towards the backside (8), and the light-sensing device (10a-f;22a-b) is arranged to sense at least a fraction of the emitted light following passage through the substrate (7) and reflection at the backside (8), and configured to output a signal indicative of a reflecting state of the backside, thereby enabling detection of an attempt to tamper with the backside (8) of the semiconductor device (5;20;30;40;50;60). Through the present invention, a semiconductor device can be equipped with a backside tamper protection which neither restricts the field of application of the semiconductor device, nor the choice of packaging of the device.

摘要翻译： 一种防篡改半导体器件（5; 20; 30; 40; 50; 60），其包括形成在基板（7）的电路侧（6）上的多个电子电路，所述多个电子电路具有背面（8 ），并且包括设置在半导体的电路侧（6）上的至少一个发光器件（9a-f; 21）和至少一个光感测器件（10a-f; 22a-b） 设备。 发光装置（9a-f; 21）被布置成将包括基板（7）是透明的波长范围的光发射到朝向背面（8）的基板中，并且光感测装置（10a） -f; 22a-b）布置成感测通过所述基板（7）的所发射的光的至少一部分和在所述背面（8）处的反射，并且被配置为输出指示所述背面的反射状态的信号 从而能够检测到篡改半导体器件（5; 20; 30; 40; 50; 60）的背面（8）的尝试。 通过本发明，半导体器件可以配备有不限制半导体器件的应用领域的背面篡改保护，也可以选择器件的封装。

公开(公告)号：US20100078636A1

公开(公告)日：2010-04-01

申请号：US12527551

申请日：2008-02-13

申请人： Frank Zachariasse

发明人： Frank Zachariasse

IPC分类号： G06K19/073 ,  H01L33/00

CPC分类号： H01L23/576 ,  G06F21/77 ,  G06F21/86 ,  G06F2221/2121 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/13091 ,  H04L9/3278 ,  H01L2924/00014 ,  H01L2924/00

摘要： A tamper-resistant semiconductor device (5;20;30;40;50;60) which includes a plurality of electronic circuits formed on a circuitry side (6) of a substrate (7) having an opposite side which is a backside (8) of the semiconductor device, and comprises at least one light-emitting device (9a-f;21) and at least one light-sensing device (10a-f;22a-b) provided on the circuitry side (6) of the semiconductor device. The light-emitting device (9a-f;21) is arranged to emit light, including a wavelength range for which the substrate (7) is transparent, into the substrate towards the backside (8), and the light-sensing device (10a-f;22a-b) is arranged to sense at least a fraction of the emitted light following passage through the substrate (7) and reflection at the backside (8), and configured to output a signal indicative of a reflecting state of the backside, thereby enabling detection of an attempt to tamper with the backside (8) of the semiconductor device (5;20;30;40;50;60). Through the present invention, a semiconductor device can be equipped with a backside tamper protection which neither restricts the field of application of the semiconductor device, nor the choice of packaging of the device.

摘要翻译： 一种防篡改半导体器件（5; 20; 30; 40; 50; 60），其包括形成在基板（7）的电路侧（6）上的多个电子电路，所述多个电子电路具有背面（8 ），并且包括设置在半导体的电路侧（6）上的至少一个发光器件（9a-f; 21）和至少一个光感测器件（10a-f; 22a-b） 设备。 发光装置（9a-f; 21）被布置成将包括基板（7）是透明的波长范围的光发射到朝向背面（8）的基板中，并且光感测装置（10a） -f; 22a-b）布置成感测通过所述基板（7）的所发射的光的至少一部分和在所述背面（8）处的反射，并且被配置为输出指示所述背面（7）的反射状态的信号 从而能够检测到篡改半导体器件（5; 20; 30; 40; 50; 60）的背面（8）的尝试。 通过本发明，半导体器件可以配备有不限制半导体器件的应用领域的背面篡改保护，也可以选择器件的封装。

公开(公告)号：US20080304054A1

公开(公告)日：2008-12-11

申请号：US11913675

申请日：2006-05-04

申请人： Martijn Goosens ,  Frank Zachariasse

发明人： Martijn Goosens ,  Frank Zachariasse

IPC分类号： G01N21/01 ,  H01L21/67 ,  H01L23/544

CPC分类号： H01L22/12 ,  G01R31/311

摘要： A method for analyzing an integrated circuit (IC) comprising a plurality of semiconductor devices is disclosed. The method comprises the steps of forming a diffraction lens (100) comprising a plurality of concentric diffraction zones (110) in a first area of a further surface opposite to the first surface of the substrate (10), and a further step of optically accessing a subset (30) of the plurality of semiconductor devices (20) through the diffraction lens (100). Due to the fact that a diffraction lens (100) can be implemented at submicron sizes, the lens (100) can be formed more cheaply than a refraction lens, which usually is several microns deep. Moreover, the lens (100) can be easily polished off the substrate (10), which facilitates repeated relocation of the lens (100) on the substrate (10), thus improving the chance of optically detecting a fault inside the IC.

摘要翻译： 公开了一种用于分析包括多个半导体器件的集成电路（IC）的方法。 该方法包括以下步骤：在与衬底（10）的第一表面相对的另一表面的第一区域中形成包括多个同心衍射区（110）的衍射透镜（100），以及进一步的光学存取步骤 通过衍射透镜（100）的多个半导体器件（20）中的子集（30）。 由于可以以亚微米尺寸实现衍射透镜（100），因此透镜（100）可以比通常为几微米深的折射透镜更廉价地形成。 此外，透镜（100）可以容易地从基板（10）抛光，这有利于透镜（100）在基板（10）上的重复定位，从而提高了光学检测IC内部故障的机会。