公开(公告)号：US10444783B2

公开(公告)日：2019-10-15

申请号：US15597136

申请日：2017-05-16

Applicant: PixArt Imaging Inc.

Inventor： Cheng-Seng Hsu

IPC: G04C21/36 ,  H03B5/36 ,  H03K3/03 ,  G05F3/26

Abstract: A voltage-to-current circuit employs low leakage manufacturing process transistor(s) to connect at least one non-controlled terminal (e.g. source, drain, or base of MOSFET) and/or control terminal (e.g. gate of MOSFET) of a low power manufacturing process transistor to a predetermined level such as ground level or power supply voltage level when turning off the low power manufacturing process transistor, so as to connect at least two terminals of the low power manufacturing process transistor to the same voltage level, for avoiding or reducing leakage current of the low power manufacturing process transistor when it is turned off.

公开(公告)号：US10404934B2

公开(公告)日：2019-09-03

申请号：US15434035

申请日：2017-02-15

Applicant: PixArt Imaging Inc.

Inventor： Cheng-Seng Hsu ,  Jui-Te Chiu

IPC: H04N5/378

Abstract: An analog-to-digital signal processing method applied for an image sensor includes: providing a global analog-to-digital converter (ADC) capable of converting analog signals of all pixels of a pixel array into digital signals; providing a column-parallel ADC capable of respectively converting a plurality of analog signals of a plurality of pixels on different columns of the pixel array into a plurality of digital signals by using a plurality of ADC circuits; and, dynamically selecting and switching to enable one of the global ADC and column-parallel ADC to perform analog-to-digital conversion for analog data/signals of pixels on the pixel array.

公开(公告)号：US20180175793A1

公开(公告)日：2018-06-21

申请号：US15597136

申请日：2017-05-16

Applicant: PixArt Imaging Inc.

Inventor： Cheng-Seng Hsu

IPC: H03B5/02 ,  G05F3/26

CPC classification number: G05F3/267 ,  H03B2200/0038

Abstract: A voltage-to-current circuit employs low leakage manufacturing process transistor(s) to connect at least one non-controlled terminal (e.g. source, drain, or base of MOSFET) and/or control terminal (e.g. gate of MOSFET) of a low power manufacturing process transistor to a predetermined level such as ground level or power supply voltage level when turning off the low power manufacturing process transistor, so as to connect at least two terminals of the low power manufacturing process transistor to the same voltage level, for avoiding or reducing leakage current of the low power manufacturing process transistor when it is turned off.

公开(公告)号：US20180103224A1

公开(公告)日：2018-04-12

申请号：US15434035

申请日：2017-02-15

Applicant: PixArt Imaging Inc.

Inventor： Cheng-Seng Hsu ,  Jui-Te Chiu

IPC: H04N5/378 ,  H04N5/3745 ,  H04N5/357 ,  H04N5/363

CPC classification number: H04N5/378

Abstract: An analog-to-digital signal processing method applied for an image sensor includes: providing a global analog-to-digital converter (ADC) capable of converting analog signals of all pixels of a pixel array into digital signals; providing a column-parallel ADC capable of respectively converting a plurality of analog signals of a plurality of pixels on different columns of the pixel array into a plurality of digital signals by using a plurality of ADC circuits; and, dynamically selecting and switching to enable one of the global ADC and column-parallel ADC to perform analog-to-digital conversion for analog data/signals of pixels on the pixel array.

公开(公告)号：US09455823B2

公开(公告)日：2016-09-27

申请号：US14720933

申请日：2015-05-25

Applicant: PIXART IMAGING INC.

Inventor： Cheng-Seng Hsu

IPC: H03D3/24 ,  H04L7/033

CPC classification number: H03L7/0996

Abstract: A four-phase clock generator with timing sequence self-detection including a phase-locked loop (PLL), a frequency dividing module, and a detection and control module. The PLL generates a first to a fourth reference clock signal with the same frequency, respectively, wherein each consecutive two of the first to the fourth reference clock signals have a 90-degree phase difference. The frequency dividing module is coupled to the PLL and determines whether to perform frequency dividing on the first to the fourth reference clock signals to obtain a first through a fourth output clock signal according to a first control signal. The detection and control module is coupled to the frequency dividing module and detects a timing sequence of the first to the fourth output clock signals to output the first control signal accordingly.

Abstract translation: 具有定时序列自检的四相时钟发生器，包括锁相环（PLL），分频模块和检测和控制模块。 PLL分别产生具有相同频率的第一至第四参考时钟信号，其中第一至第四参考时钟信号中的每个连续的两个具有90度的相位差。 分频模块耦合到PLL并确定是否按照第一至第四参考时钟信号进行分频，以根据第一控制信号获得第一至第四输出时钟信号。 检测和控制模块耦合到分频模块，并检测第一至第四输出时钟信号的定时序列，以相应地输出第一控制信号。

公开(公告)号：US10067579B2

公开(公告)日：2018-09-04

申请号：US14877942

申请日：2015-10-08

Applicant: PixArt Imaging Inc.

Inventor： Cheng-Seng Hsu ,  Jui-Te Chiu ,  Chung-Ting Yang

IPC: G06F3/033 ,  G06F3/038 ,  G06F3/03 ,  G06F3/0354

Abstract: An amending circuit includes a comparing unit, a predetermined voltage generating unit, a roller switch, alight emitting unit switch and a controlling unit. A pin of the mouse and the predetermined voltage generating unit are respectively connected to two input terminals of the comparing unit. The controlling unit is coupled to the light emitting unit switch and the roller switch. The controlling unit switches to a motion detecting mode to drive a current of the current source to flow toward a second pin via the first pin and a light emitting unit of the mouse. The controlling unit further switches to a roller detecting mode to set a pressure of the first pin lower than a predetermined voltage of the predetermined voltage generating unit while the roller is grounded or to set the first pin higher than the predetermined voltage while the roller is not grounded.

公开(公告)号：US20160124525A1

公开(公告)日：2016-05-05

申请号：US14877942

申请日：2015-10-08

Applicant: PixArt Imaging Inc.

Inventor： Cheng-Seng Hsu ,  Jui-Te Chiu ,  Chung-Ting Yang

IPC: G06F3/038 ,  G06F3/0354

CPC classification number: G06F3/0383 ,  G06F3/0317 ,  G06F3/03543

Abstract: An amending circuit includes a comparing unit, a predetermined voltage generating unit, a roller switch, alight emitting unit switch and a controlling unit. A pin of the mouse and the predetermined voltage generating unit are respectively connected to two input terminals of the comparing unit. The controlling unit is coupled to the light emitting unit switch and the roller switch. The controlling unit switches to a motion detecting mode to drive a current of the current source to flow toward a second pin via the first pin and a light emitting unit of the mouse. The controlling unit further switches to a roller detecting mode to set a pressure of the first pin lower than a predetermined voltage of the predetermined voltage generating unit while the roller is grounded or to set the first pin higher than the predetermined voltage while the roller is not grounded.

Abstract translation: 修正电路包括比较单元，预定电压产生单元，滚轮开关，发光单元开关和控制单元。 鼠标的引脚和预定电压产生单元分别连接到比较单元的两个输入端子。 控制单元耦合到发光单元开关和滚轮开关。 控制单元切换到运动检测模式以驱动电流源的电流经由第一引脚和鼠标的发光单元朝向第二引脚流动。 控制单元进一步切换到辊检测模式，以在辊接地时使第一销的压力低于预定电压产生单元的预定电压，或者在辊不是时将第一销设置为高于预定电压 接地