OUTER CODE ERROR CORRECTION
    1.
    发明申请
    OUTER CODE ERROR CORRECTION 有权
    外部代码错误修正

    公开(公告)号:US20120304037A1

    公开(公告)日:2012-11-29

    申请号:US13116882

    申请日:2011-05-26

    IPC分类号: H03M13/05 G06F11/10

    CPC分类号: G06F11/1012 H03M13/2909

    摘要: Values are grouped into a first set of groupings of values. Based on inner codes, the number of groupings in the first set of groupings that have at least one erroneous value is determined. If the number of groupings in the first set of groupings that have an erroneous value is fewer than a maximum number of groupings that can be corrected by outer codes, a seek operation is begun. During the seek operation, the outer codes are used to detect and correct the erroneous values that were produced during the reading of values. In other aspects, a parity section for a data section of a data storage device is dirtied before writing any data to the data section such that if writing to the data section is interrupted, the parity section will indicate that it should not be used to correct data read from the data section.

    摘要翻译: 值被分组成第一组值分组。 基于内部代码,确定具有至少一个错误值的第一组分组中的分组数量。 如果具有错误值的第一组分组中的分组数量少于可由外部代码校正的分组的最大数量,则开始搜索操作。 在搜索操作期间,外部代码用于检测和更正在读取值期间产生的错误值。 在其他方面,在向数据部分写入任何数据之前,用于数据存储装置的数据部分的奇偶校验部分被弄脏,使得如果对数据部分的写入被中断,则奇偶校验部分将指示不应该用于校正 从数据部分读取数据。

    Outer code error correction
    2.
    发明授权
    Outer code error correction 有权
    外码纠错

    公开(公告)号:US08448045B2

    公开(公告)日:2013-05-21

    申请号:US13116882

    申请日:2011-05-26

    IPC分类号: G11C29/00

    CPC分类号: G06F11/1012 H03M13/2909

    摘要: Values are grouped into a first set of groupings of values. Based on inner codes, the number of groupings in the first set of groupings that have at least one erroneous value is determined. If the number of groupings in the first set of groupings that have an erroneous value is fewer than a maximum number of groupings that can be corrected by outer codes, a seek operation is begun. During the seek operation, the outer codes are used to detect and correct the erroneous values that were produced during the reading of values. In other aspects, a parity section for a data section of a data storage device is dirtied before writing any data to the data section such that if writing to the data section is interrupted, the parity section will indicate that it should not be used to correct data read from the data section.

    摘要翻译: 值被分组成第一组值分组。 基于内部代码,确定具有至少一个错误值的第一组分组中的分组数量。 如果具有错误值的第一组分组中的分组数量少于可由外部代码校正的分组的最大数量,则开始搜索操作。 在搜索操作期间,外部代码用于检测和更正在读取值期间产生的错误值。 在其他方面,在向数据部分写入任何数据之前,用于数据存储装置的数据部分的奇偶校验部分被弄脏,使得如果对数据部分的写入被中断,则奇偶校验部分将指示不应该用于校正 从数据部分读取数据。

    Preventive recovery from adjacent track interference
    5.
    发明授权
    Preventive recovery from adjacent track interference 有权
    相邻轨道干扰的预防性恢复

    公开(公告)号:US07747907B2

    公开(公告)日:2010-06-29

    申请号:US11230718

    申请日:2005-09-20

    IPC分类号: G06F11/00

    摘要: A predictive failure control circuit and associated method are provided in a data storing and retrieving apparatus. The circuit is configured to schedule a data integrity operation on data associated with a subportion of a data storage space, in relation to a comparison of an accumulated plurality of executed host access commands associated with the subportion. The subportion can comprise a sector or a single track or a band of tracks. A table preferably stores accumulated number of host access commands for each of a plurality of subportions of the data storage space. The data integrity operation can comprise reading the data on to detect degradation and restoring the recovered data to the same or to new, different tracks. The data subportions can also be reallocated to a new location.

    摘要翻译: 在数据存储和检索装置中提供预测故障控制电路和相关联的方法。 该电路被配置为针对与该子部分相关联的累积的多个执行的主机访问命令的比较来调度与数据存储空间的子部分相关联的数据的数据完整性操作。 该子部分可以包括扇区或单个轨道或轨道带。 表优选存储数据存储空间的多个子部分中的每一个的主机访问命令的累积数量。 数据完整性操作可以包括读取数据以检测劣化并将恢复的数据恢复到相同或新的不同的轨道。 数据子部分也可以重新分配到一个新的位置。

    Data distribution in systems with multiple storage entities
    6.
    发明授权
    Data distribution in systems with multiple storage entities 有权
    具有多个存储实体的系统中的数据分发

    公开(公告)号:US08326799B2

    公开(公告)日:2012-12-04

    申请号:US12576552

    申请日:2009-10-09

    IPC分类号: G06F17/00 G06F7/00

    CPC分类号: G06F17/30067

    摘要: The disclosure is related to systems and methods of distributing data in devices with multiple storage entities. In a particular embodiment, a system is disclosed that includes multiple storage entities, with each storage entity having a sub-controller. A controller is communicatively coupled to each of the multiple storage entities. The controller is configured to send at least one of a respective copy of data or metadata associated with the respective copy of the data to each of the multiple storage entities. Upon receipt of the at least one of the respective copy of the data or the metadata associated with the respective copy of the data, each sub-controller provides storage competency information of the respective storage entity for the respective copy of the data. Upon receiving storage competency information for the multiple storage entities, the controller selects a particular one of the multiple storage entities and notifies the selected storage entity to store the respective copy of the data.

    摘要翻译: 本公开涉及在具有多个存储实体的设备中分发数据的系统和方法。 在特定实施例中,公开了一种包括多个存储实体的系统,每个存储实体具有子控制器。 控制器通信地耦合到多个存储实体中的每一个。 控制器被配置为将与数据的相应副本相关联的数据或元数据的相应副本中的至少一个发送到多个存储实体中的每一个。 在接收到与数据的相应副本相关联的数据或元数据的相应副本中的至少一个时,每个子控制器为相应的数据副本提供相应存储实体的存储能力信息。 在接收到多个存储实体的存储能力信息时,控制器选择多个存储实体中的特定一个,并通知所选择的存储实体来存储数据的相应拷贝。

    Switched memory devices
    7.
    发明授权
    Switched memory devices 有权
    切换存储器件

    公开(公告)号:US08164936B2

    公开(公告)日:2012-04-24

    申请号:US12578940

    申请日:2009-10-14

    IPC分类号: G11C5/06

    摘要: A data storage system includes a plurality of memory devices for storing data. The plurality of memory devices is classified into a plurality of groups of memory devices. A control circuit is adapted to provide concurrent memory access operations to the plurality of memory devices. Each of a plurality of data channels is configured to provide a data path between the control circuit and one of the groups of memory devices. A plurality of switches is configured to connect and disconnect one of the memory devices in a select one of the groups of memory devices to one of the plurality of data channels and concurrently connect and disconnect another of the memory devices in the select group of memory devices to a different one of the plurality of data channels.

    摘要翻译: 数据存储系统包括用于存储数据的多个存储器件。 多个存储器件被分为多组存储器件。 控制电路适于向多个存储器件提供并行存储器访问操作。 多个数据信道中的每一个被配置为在控制电路和存储器装置组之一之间提供数据路径。 多个开关被配置为将存储器设备组中的选择一个中的一个存储器件中的一个连接到多个数据通道中的一个,并同时连接和断开存储器设备组中的另一个存储器件 到多个数据信道中的不同的数据信道。

    Data Storage Management in Heterogeneous Memory Systems
    8.
    发明申请
    Data Storage Management in Heterogeneous Memory Systems 有权
    异构存储器系统中的数据存储管理

    公开(公告)号:US20110145537A1

    公开(公告)日:2011-06-16

    申请号:US12638197

    申请日:2009-12-15

    IPC分类号: G06F12/02 G06F12/00

    摘要: A data storage management system is provided, which includes multiple storage entities with differing storage characteristics. A controller is communicatively coupled to each of the multiple storage entities. The controller is configured to associate one or more storage attributes of a received object with one or more of the different storage characteristics, and to store the received object in one or more of the multiple storage entities based on the association of the one or more of the storage attributes of the received object with the one or more of the different storage characteristics.

    摘要翻译: 提供了一种数据存储管理系统,其包括具有不同存储特性的多个存储实体。 控制器通信地耦合到多个存储实体中的每一个。 控制器被配置为将接收到的对象的一个​​或多个存储属性与不同存储特性中的一个或多个相关联,并且基于所述多个存储实体中的一个或多个的关联将所接收的对象存储在多个存储实体中的一个或多个中 接收到的对象的存储属性与一个或多个不同的存储特性。

    Division of memory into non-binary sized cache and non-cache areas
    9.
    发明授权
    Division of memory into non-binary sized cache and non-cache areas 有权
    将内存分为非二进制缓存和非缓存区

    公开(公告)号:US06324633B1

    公开(公告)日:2001-11-27

    申请号:US09473781

    申请日:1999-12-29

    IPC分类号: G06F1206

    CPC分类号: G06F12/0802 G06F2212/2515

    摘要: A cache system and method for configuring and accessing a cache that enables a binary-sized memory space to be efficiently shared amongst cache and non-cache uses. A storage device is provided having a plurality of blocks where each block is identified with a block address. An access request identifies a target block address. The target block address includes an upper portion and a lower portion. A non-binary divide is performed on the upper portion to produce a quotient and a remainder. The remainder portion is combined with the lower portion to create an index. The index is applied to a tag memory structure to select an entry or set of entries in the tag memory structure. The content of the selected entry is compared to the quotient portion to determine if the target block is represented in the cache.

    摘要翻译: 用于配置和访问高速缓存的缓存系统和方法,其使二进制大小的存储器空间能够在高速缓存和非高速缓存之间有效地共享。 提供具有多个块的存储设备,其中每个块被标识为块地址。 访问请求标识目标块地址。 目标块地址包括上部​​和下部。 在上部执行非二进制除法以产生商和余数。 剩余部分与下部组合以创建索引。 索引应用于标签存储器结构以在标签存储器结构中选择条目或条目集合。 将所选条目的内容与商部分进行比较,以确定目标块是否在高速缓存中表示。

    Write management using partial parity codes
    10.
    发明授权
    Write management using partial parity codes 有权
    使用部分奇偶校验码进行写入管理

    公开(公告)号:US08924814B2

    公开(公告)日:2014-12-30

    申请号:US13596436

    申请日:2012-08-28

    IPC分类号: H03M13/00 H03M13/29

    摘要: A partial outer parity management system generates a product code based on a partial data block write to a data block and partial outer parity generated by a previous partial data block write to the data block. In one implementation, a storage device includes cache storage circuit accessible by the parity generator, the cache storage circuit being configured to cache the partial outer parity generated by the previous partial data block write to the data block in a partial outer parity cache designated for association with the product code.

    摘要翻译: 部分外部奇偶校验管理系统基于对数据块的部分数据块写入和由对数据块的先前部分数据块写入生成的部分外部奇偶校验生成乘积代码。 在一个实现中,存储设备包括由奇偶校验发生器可访问的高速缓存存储电路,高速缓存存储电路被配置为将由先前的部分数据块写入生成的部分外部奇偶校验缓存到指定用于关联的部分外部奇偶校验缓存中的数据块 与产品代码。