公开(公告)号：US20240087639A1

公开(公告)日：2024-03-14

申请号：US17940430

申请日：2022-09-08

Applicant: QUALCOMM INCORPORATED

Inventor： Victor VAN DER VEEN ,  Pankaj DESHMUKH ,  Behnam DASHTIPOUR ,  David HARTLEY

IPC: G11C11/4078 ,  G11C11/406

CPC classification number: G11C11/4078 ,  G11C11/40611 ,  G11C11/40618

Abstract: Mitigating or managing an effect known as “rowhammer” upon a DRAM device may include a memory controller receiving an activation count threshold value from the DRAM device. The memory controller may detect row activation commands directed to the DRAM device and count the number of the row activation commands. The memory controller may send a mitigative refresh command to the DRAM device based on the result of comparing the counted number of row activation commands with the received activation count threshold value.

公开(公告)号：US20240312508A1

公开(公告)日：2024-09-19

申请号：US18184602

申请日：2023-03-15

Applicant: QUALCOMM INCORPORATED

Inventor： Victor VAN DER VEEN ,  David HARTLEY

IPC: G11C11/406 ,  G11C11/4078

CPC classification number: G11C11/40618 ,  G11C11/40615 ,  G11C11/4078

Abstract: Managing row hammering in a DRAM device may include maintaining per-row activation command counts. A next aggressor row may be determined based on the counts. A victim queue may be maintained. A refresh operation may be directed to a row indicated by the victim queue when conditions include that the victim queue is not empty when the refresh command is received. The current aggressor row may be updated with the next aggressor row when conditions include that the victim queue is empty when the refresh command is received. Following updating the current aggressor row, the count of the next aggressor row may be updated. A victim row corresponding to the current aggressor row may be added to the victim queue if the victim queue is empty when the refresh command is received.

公开(公告)号：US20190065405A1

公开(公告)日：2019-02-28

申请号：US16002872

申请日：2018-06-07

Applicant: QUALCOMM Incorporated

Inventor： Kevin Christopher GOTZE ,  Can ACAR ,  David HARTLEY ,  Qing LI ,  Daniel GODAS-LOPEZ

IPC: G06F12/14 ,  G06F21/78 ,  G06F3/06

Abstract: Several features pertain to computing systems equipped to perform speculative processing and configured to access device memory (e.g. non-speculative or unspeculatable memory) and non-device memory (e.g. speculative or speculatable memory). Malicious attacks may seek to obtain sensitive information from such systems by exploiting speculative code execution. Herein, techniques are described whereby sensitive data is protected from such attacks by placing the data in a page of memory not ordinarily used as device memory, and then designating or marking the page as device memory (e.g. marking the page as unspeculatable). By designating the page as unspeculatable device memory, the processor does not speculatively access the sensitive information (e.g. speculation stops once a branch is invoked that would access the page) and so certain types of attacks can be mitigated. In some examples, additional malicious attack defenses or mitigations are performed such as address space un-mapping, address space layout randomization, or anti-replay-protection.

公开(公告)号：US20220129200A1

公开(公告)日：2022-04-28

申请号：US17445220

申请日：2021-08-17

Applicant: QUALCOMM Incorporated

Inventor： Victor VAN DER VEEN ,  Mosaddiq SAIFUDDIN ,  Pankaj DESHMUKH ,  Behnam DASHTIPOUR ,  David HARTLEY

IPC: G06F3/06

Abstract: A DRAM memory controller is provided that identifies a marker command directed to a given row in a DRAM. If a threshold probability is satisfied in response to an identification of the marker command, the DRAM memory controller commands the DRAM to refresh a neighboring row in the DRAM. The neighboring row may be a neighboring of the given row or of a recently-closed row.

公开(公告)号：US20170075820A1

公开(公告)日：2017-03-16

申请号：US15232723

申请日：2016-08-09

Applicant: QUALCOMM Incorporated

Inventor： David HARTLEY ,  Roberto AVANZI ,  Rosario CAMMAROTA

IPC: G06F12/14 ,  G06F21/62 ,  G06F21/12

CPC classification number: G06F12/1408 ,  G06F21/121 ,  G06F21/125 ,  G06F21/14 ,  G06F21/62 ,  G06F21/74 ,  G06F2212/1052 ,  G06F2221/0755

Abstract: Techniques for protecting software in a computing device are provided. A method according to these techniques includes receiving a request from a non-secure software module to execute an instruction of a secure software module comprising encrypted program code, determining whether the instruction comprises an instruction associated with a controlled point of entry to the secure software module accessible outside of the secure software module, executing one or more instructions of the secure software module responsive to the instruction comprising an instruction associated with the controlled point of entry to the secure software module, and controlling exit from the secure software module to return execution to the non-secure software module.

Abstract translation: 提供了用于在计算设备中保护软件的技术。 根据这些技术的方法包括接收来自非安全软件模块的请求以执行包括加密程序代码的安全软件模块的指令，确定指令是否包括与控制入口点相关联的指令到安全软件模块 可访问安全软件模块外部，响应于包括与受控控制点相关联的指令到安全软件模块的指令执行安全软件模块的一个或多个指令，以及控制从安全软件模块退出以将执行返回到 非安全软件模块。

公开(公告)号：US20200004697A1

公开(公告)日：2020-01-02

申请号：US16024596

申请日：2018-06-29

Applicant: QUALCOMM Incorporated

Inventor： Vincent Pierre LE ROY ,  Kevin Christopher GOTZE ,  David HARTLEY

IPC: G06F12/14 ,  G06F21/79 ,  G06F21/76 ,  G06F21/62

Abstract: In an aspect, an apparatus defines a group of registers that includes at least one of a plurality of registers in an integrated circuit. Each of the plurality of registers in the integrated circuit may be constrained to one of a plurality of fixed groups of registers. The apparatus applies a first set of access control rules to the group of registers, the first set of access control rules configured to override any of a second set of access control rules applied to the one or more fixed groups of registers.