公开(公告)号：US10516412B1

公开(公告)日：2019-12-24

申请号：US16138499

申请日：2018-09-21

Applicant: QUALCOMM INCORPORATED

Inventor： Shahin Mehdizad Taleie ,  Ashok Swaminathan ,  Sudharsan Kanagaraj ,  Negar Rashidi ,  Siyu Yang ,  Behnam Sedighi ,  Honghao Ji ,  Jaswinder Singh ,  Andrew Weil ,  Dongwon Seo ,  Xilin Liu

IPC: H03M1/66 ,  G04F10/00 ,  H03M1/68

Abstract: An interleaved digital-to-analog converter (DAC) system may include a first sub-DAC and a second sub-DAC and may be configured to provide both a converter output signal and a calibration output signal. The converter output signal may be provided by adding the first sub-DAC output signal and the second sub-DAC output signal. The calibration output signal may be provided by subtracting one of the first and second sub-DAC output signals from the other. The calibration output signal may be used as feedback to adjust the phase of one of the sub-DACs relative to the other, to promote phase matching their output signals.