Dynamic memory utilization in a system on a chip
    1.
    发明授权
    Dynamic memory utilization in a system on a chip 有权
    芯片系统中的动态内存利用率

    公开(公告)号:US09354812B1

    公开(公告)日:2016-05-31

    申请号:US14620797

    申请日:2015-02-12

    Abstract: Various embodiments of methods and systems for dynamically managing the capacity utilization of a memory component in a system on a chip (“SoC”) are disclosed. Memory utilization is optimized in certain embodiments through dynamic compression and decompression within a memory subsystem. Based on parameters of the SoC that are indicative of a quality of service (“QoS”) level, a memory controller may determine that the format of the data in a write request should be converted and stored in a relinked memory address. Subsequently, a primary memory address associated with the data may be released for storage of different data. Similarly, embodiments may return data requested in a write request in a format different than that which was requested.

    Abstract translation: 公开了用于动态管理芯片上系统(“SoC”)中的存储器组件的容量利用的方法和系统的各种实施例。 在某些实施例中,通过在存储器子系统内的动态压缩和解压缩来优化存储器利用。 基于指示服务质量(“QoS”)级别的SoC的参数,存储器控制器可以确定写入请求中的数据的格式应该被转换并存储在重新链接的存储器地址中。 随后,可以释放与数据相关联的主存储器地址以存储不同的数据。 类似地,实施例可以以与请求的格式不同的格式返回在写入请求中请求的数据。

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