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公开(公告)号：US11668735B2
公开(公告)日：2023-06-06
申请号：US16935092
申请日：2020-07-21
Applicant: QUALCOMM Incorporated
Inventor： Stefano Facchin , Baptiste Grave , Bharani Chava , David Jonathan Walshe
IPC: G02F1/1368 , G02F1/1362 , G01R19/165 , H01L23/528 , H01L27/092 , H01L29/24 , H01L29/786
CPC classification number: G01R19/16519 , G02F1/136286 , H01L23/5286 , H01L27/092 , H01L29/24 , H01L29/7869 , G02F1/1368
Abstract: An IC is provided. The IC includes a power grid including Mx layer interconnects extending in a first direction on an Mx layer and Mx+1 layer interconnects extending in a second direction orthogonal to the first direction on an Mx+1 layer, where x>5. In addition, the IC includes a plurality of power switches. Further, the IC includes at least one sensing element located between the Mx layer and the Mx+1 layer and configured to measure a voltage drop to devices powered by the plurality of power switches. The one or more of the plurality of power switches may be located below the power grid. The power switches of the plurality of power switches may be adjacent in the first direction and in the second direction to each sensing element of the at least one sensing element.
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公开(公告)号：US11334101B2
公开(公告)日：2022-05-17
申请号：US16720333
申请日：2019-12-19
Applicant: QUALCOMM Incorporated
Inventor： Baptiste Grave , Mustafa Keskin
Abstract: A method and an apparatus to provide bandgap calibration for multiple outputs are disclosed. In one implementation, a computing chip includes a bandgap current generator; a first adjustable current output coupled to the bandgap current generator; a second adjustable current output coupled to the bandgap current generator; a first switch selectively coupling the first adjustable current output to a calibration circuit and to a first analog-to-digital converter (ADC); and a second switch selectively coupling the second adjustable current output to a load on the computing chip and to the ADC.
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公开(公告)号：US12289106B2
公开(公告)日：2025-04-29
申请号：US18459125
申请日：2023-08-31
Applicant: QUALCOMM Incorporated
Inventor： Baptiste Grave , Robert David Froggatt , Stefano Facchin , Roi Naor
Abstract: An injection-locked oscillator includes a plurality of delay elements, two or more voltage control circuits, a phase comparator and a controller. The plurality of delay elements is connected in a loop and coupled to a global power supply. Each delay element has an input driven by a preceding stage and an output that drives a next stage. Each voltage control circuit couples one of the plurality of delay elements to the global power supply. The phase comparator is coupled to in-phase and quadrature outputs of the injection-locked oscillator. The controller is coupled to an output of the phase comparator and is configured to drive control inputs of the two or more voltage control circuits. The control input of each voltage control circuit determines a level of a voltage drop across the each voltage control circuit.
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公开(公告)号：US10983546B1
公开(公告)日：2021-04-20
申请号：US16720285
申请日：2019-12-19
Applicant: QUALCOMM Incorporated
Inventor： Baptiste Grave , Keith Anthony O'Donoghue
Abstract: A system includes a bandgap voltage generator coupled to a voltage supply and configured to produce a plurality of reference voltage levels in response to a plurality of calibration codes; an analog-to-digital converter (ADC) coupled to a reference voltage output of the bandgap voltage generator; a logic circuit coupled to an output of the ADC; a first memory element coupled to the logic circuit and configured to store a calibration coefficient indicative of a relationship of the calibration codes and the reference voltage levels; and a second memory element coupled to the logic circuit and configured to store a value of a first reference voltage level for the reference voltage output, wherein the logic circuit is configured to generate a first calibration code from the value of the first reference voltage level and the calibration coefficient.
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