公开(公告)号：US20150067290A1

公开(公告)日：2015-03-05

申请号：US14018399

申请日：2013-09-04

Applicant: QUALCOMM Incorporated

Inventor： Ritu CHABA ,  Balachander GANESAN ,  ChangHo JUNG ,  Sei Seung YOON

IPC: G06F13/16

CPC classification number: G06F13/1689 ,  G06F2212/1028

Abstract: Disclosed are various apparatuses and methods for memory access time tracking in dual-rail systems. An apparatus may include a memory coupled to a first voltage rail and having a data output, a data circuit coupled to a second voltage rail and configured to receive the data output from the memory, and a timing circuit configured to adjust an access time of the memory based on a second voltage rail level. A method may include determining a voltage rail level of a data circuit, adjusting the access time of the memory based on the voltage rail level of the data circuit, outputting data from the memory, and receiving the output data by the data circuit.

Abstract translation: 公开了用于双轨系统中的存储器访问时间跟踪的各种装置和方法。 设备可以包括耦合到第一电压轨并具有数据输出的存储器，耦合到第二电压轨并被配置为接收从存储器输出的数据的数据电路，以及定时电路，被配置为调整存储器的访问时间 基于第二电压轨级的存储器。 一种方法可以包括确定数据电路的电压轨级，基于数据电路的电压轨电平调整存储器的访问时间，从存储器输出数据，以及由数据电路接收输出数据。