公开(公告)号：US20150078497A1

公开(公告)日：2015-03-19

申请号：US14265877

申请日：2014-04-30

Applicant: QUALCOMM Incorporated

Inventor： Gang ZHANG ,  Frederic BOSSU

IPC: H04L27/26

CPC classification number: H04L27/2647 ,  H04B1/005

Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating local oscillator (LO) signals for multiple receive chains. One example circuit for generating first and second signals generally includes a first voltage controlled oscillator (VCO) configured to output the first signal at a first frequency and associated with a first receive chain for receiving a first carrier of an aggregated resource; and a second VCO configured to output the second signal at a second frequency and associated with a second receive chain for receiving a second carrier of the aggregated resource. The second frequency is different than the first frequency. In this manner, pulling or coupling between the two VCOs may be avoided, even if the two VCOs are implemented on the same radio frequency integrated circuit (RFIC).

Abstract translation: 本公开的某些方面提供了用于为多个接收链产生本地振荡器（LO）信号的方法和装置。 用于产生第一和第二信号的示例电路通常包括被配置为以第一频率输出第一信号并与第一接收链相关联的第一压控振荡器（VCO），用于接收聚合资源的第一载波; 以及第二VCO，被配置为以第二频率输出第二信号并与第二接收链相关联，用于接收聚合资源的第二载波。 第二频率与第一频率不同。 以这种方式，即使两个VCO实现在相同的射频集成电路（RFIC）上，也可以避免两个VCO之间的拉或耦合。

公开(公告)号：US20150349782A1

公开(公告)日：2015-12-03

申请号：US14488248

申请日：2014-09-16

Applicant: QUALCOMM Incorporated

Inventor： Hung-Chuan PAI ,  Gang ZHANG

IPC: H03K21/02 ,  H04B1/40

CPC classification number: H03K21/02 ,  H03K5/00006 ,  H03K5/133 ,  H03K23/667 ,  H03L7/081 ,  H03L7/16 ,  H04B1/40

Abstract: Aspects of a reconfigurable frequency divider circuit are provided. A reconfigurable frequency divider can include a frequency divider that is configured to receive an input signal. The frequency divider can also include a delay circuit that is configured to receive a divided signal produced by the frequency divider. The frequency divider can also include a frequency multiplier that is configured to produce an output signal based on the delayed signal produced by the delay circuit, wherein the delay circuit is configured to receive the output signal.

Abstract translation: 提供可重构分频器电路的方面。 可重配置分频器可以包括被配置为接收输入信号的分频器。 分频器还可以包括被配置为接收由分频器产生的分频信号的延迟电路。 分频器还可以包括被配置为基于由延迟电路产生的延迟信号产生输出信号的倍频器，其中延迟电路被配置为接收输出信号。

公开(公告)号：US20150349622A1

公开(公告)日：2015-12-03

申请号：US14630506

申请日：2015-02-24

Applicant: QUALCOMM Incorporated

Inventor： Yung-Chung LO ,  Gang ZHANG ,  Yiping HAN ,  Frederic BOSSU ,  Tsai-Pi HUNG ,  Jae-Hong CHANG

IPC: H02M1/00 ,  H02M3/156

CPC classification number: H02M3/156 ,  G05F1/575 ,  H02M1/00 ,  H02M2001/0077

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus may be a regulator circuit. The regulator circuit includes a first voltage regulator to regulate a first input voltage to the first voltage regulator, the first voltage regulator including a P-type metal-oxide-semiconductor (PMOS), and a second voltage regulator to regulate a second input voltage to the second voltage regulator, the second voltage regulator including an N-type metal-oxide-semiconductor (NMOS). In an aspect, the first voltage regulator is coupled to the second voltage regulator.

Abstract translation: 提供了一种方法，装置和计算机程序产品。 该装置可以是调节器电路。 调节器电路包括第一电压调节器，用于调节到第一电压调节器的第一输入电压，第一电压调节器包括P型金属氧化物半导体（PMOS）和第二电压调节器，以将第二输入电压调节到 第二电压调节器，第二电压调节器包括N型金属氧化物半导体（NMOS）。 在一方面，第一电压调节器耦合到第二电压调节器。

公开(公告)号：US20210351696A1

公开(公告)日：2021-11-11

申请号：US17443093

申请日：2021-07-20

Applicant: QUALCOMM Incorporated

Inventor： Yung-Chung LO ,  Gang ZHANG ,  Yiping HAN ,  Frederic BOSSU ,  Tsai-Pi HUNG ,  Jae-Hong CHANG

IPC: H02M3/156 ,  H02M1/00 ,  G05F1/575

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus may be a regulator circuit. The regulator circuit includes a first voltage regulator to regulate a first input voltage to the first voltage regulator, the first voltage regulator including a P-type metal-oxide-semiconductor (PMOS), a second voltage regulator to regulate a second input voltage to the second voltage regulator, and a switch circuit to selectively activate at least one of the first voltage regulator or the second voltage regulator. In one aspect, the second voltage regulator includes an N-type metal-oxide-semiconductor (NMOS). In one aspect, the second voltage regulator comprises a two-stage operational transconductance amplifier (OTA) circuit. In an aspect, the first voltage regulator is coupled to the second voltage regulator.

公开(公告)号：US20150349712A1

公开(公告)日：2015-12-03

申请号：US14489444

申请日：2014-09-17

Applicant: QUALCOMM Incorporated

Inventor： Tsai-Pi HUNG ,  Gang ZHANG ,  Jae-Hong CHANG ,  Yung-Chung LO ,  Jianjun YU ,  Yuehai JIN

IPC: H03B5/12

CPC classification number: H03B5/1265 ,  H03B5/1212 ,  H03B5/1243

Abstract: Aspects of a reconfigurable varactor array for providing a capacitance to control an output frequency of a voltage-controlled oscillator are provided. The reconfigurable varactor array can be configured to provide a configurable capacitance. The reconfigurable varactor array can include a plurality of varactor cells connected in parallel. The reconfigurable varactor array can also include a control circuit configured to receive a control signal to select the configurable capacitance from the reconfigurable varactor array. The control circuit can include a plurality of switch groups. Each switch group can be separately connected to one varactor cell in the reconfigurable varactor array. The control signal from the control circuit can control operation of each switch group.

Abstract translation: 提供了用于提供电容以控制压控振荡器的输出频率的可重构变容二极管阵列的方面。 可配置变容二极管阵列可以配置为提供可配置的电容。 可重构变容二极管阵列可以包括并联连接的多个变容二极管单元。 可重构变容二极管阵列还可以包括控制电路，其被配置为接收控制信号以从可重构变容二极管阵列中选择可配置电容。 控制电路可以包括多个开关组。 每个开关组可以单独连接到可重新配置的变容二极管阵列中的一个变容二极管单元。 来自控制电路的控制信号可以控制每个开关组的操作。