公开(公告)号：US20170285998A1

公开(公告)日：2017-10-05

申请号：US15086943

申请日：2016-03-31

Applicant: QUALCOMM Incorporated

Inventor： Priyankar MATHURIA ,  Rakesh Kumar SINHA ,  Gururaj SHAMANNA

IPC: G06F3/06

CPC classification number: G06F3/0634 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0673 ,  G11C7/106 ,  G11C8/12 ,  G11C11/419 ,  G11C2207/005

Abstract: In an aspect of the disclosure, a method and an apparatus are provided. The apparatus may be a memory. The memory may include a first memory portion configured to store a first bit and generate a first data bit output. The first data bit output may be a function of the first bit when a first read enable is active. The memory may also include a second memory portion configured to store a second bit and generate a second data bit output. The second data bit output may be a function of the second bit when a second read enable is active. The memory may include a switch configured to select between the first and second bits for a read operation based on the first and second data bit outputs.