Method and apparatus for testing a memory device
    1.
    发明授权
    Method and apparatus for testing a memory device 有权
    用于测试存储器件的方法和装置

    公开(公告)号:US08884637B2

    公开(公告)日:2014-11-11

    申请号:US13900775

    申请日:2013-05-23

    CPC classification number: G01R31/2642 G11C11/41 G11C29/12 G11C29/50

    Abstract: In a particular embodiment, a method includes receiving a testing activation signal at a controller coupled to a semiconductor device. The method further includes biasing a well of at least one transistor of the semiconductor device in response to the received testing activation signal. The bias is provided by a biasing circuit that is responsive to the controller. While the well is biased, a test of the semiconductor device is performed to generate testing data.

    Abstract translation: 在特定实施例中,一种方法包括在耦合到半导体器件的控制器处接收测试激活信号。 该方法还包括响应于所接收的测试激活信号来偏置半导体器件的至少一个晶体管的阱。 该偏压由对控制器作出响应的偏置电路提供。 当井被偏置时,执行半导体器件的测试以产生测试数据。

    METHOD AND APPARATUS FOR TESTING A MEMORY DEVICE
    2.
    发明申请
    METHOD AND APPARATUS FOR TESTING A MEMORY DEVICE 有权
    用于测试存储器件的方法和装置

    公开(公告)号:US20130257466A1

    公开(公告)日:2013-10-03

    申请号:US13900775

    申请日:2013-05-23

    CPC classification number: G01R31/2642 G11C11/41 G11C29/12 G11C29/50

    Abstract: In a particular embodiment, a method includes receiving a testing activation signal at a controller coupled to a semiconductor device. The method further includes biasing a well of at least one transistor of the semiconductor device in response to the received testing activation signal. The bias is provided by a biasing circuit that is responsive to the controller. While the well is biased, a test of the semiconductor device is performed to generate testing data.

    Abstract translation: 在特定实施例中,一种方法包括在耦合到半导体器件的控制器处接收测试激活信号。 该方法还包括响应于所接收的测试激活信号来偏置半导体器件的至少一个晶体管的阱。 该偏压由对控制器作出响应的偏置电路提供。 当井被偏置时,执行半导体器件的测试以产生测试数据。

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