公开(公告)号：US20220037257A1

公开(公告)日：2022-02-03

申请号：US17158374

申请日：2021-01-26

Applicant: QUALCOMM Incorporated

Inventor： Kuiwon Kang ,  Michelle Yejin Kim ,  Joan Rey Villarba Buot ,  Jialing Tong

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00

Abstract: An integrated circuit (IC) package with stacked die wire bond connections has two stacked IC dies, where a first die couples to a metallization structure directly and a second die stacked on top of the first die connects to the metallization structure through wire bond connections. The IC dies are coupled to one another through an interior metal layer of the metallization structure. Vias are used to couple to the interior metal layer.

公开(公告)号：US11676905B2

公开(公告)日：2023-06-13

申请号：US17158374

申请日：2021-01-26

Applicant: QUALCOMM Incorporated

Inventor： Kuiwon Kang ,  Michelle Yejin Kim ,  Joan Rey Villarba Buot ,  Jialing Tong

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00

CPC classification number: H01L23/5386 ,  H01L21/4857 ,  H01L23/5383 ,  H01L24/48 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/92227 ,  H01L2225/06568

Abstract: An integrated circuit (IC) package with stacked die wire bond connections has two stacked IC dies, where a first die couples to a metallization structure directly and a second die stacked on top of the first die connects to the metallization structure through wire bond connections. The IC dies are coupled to one another through an interior metal layer of the metallization structure. Vias are used to couple to the interior metal layer.