公开(公告)号：US12294340B2

公开(公告)日：2025-05-06

申请号：US17805168

申请日：2022-06-02

Applicant: QUALCOMM Incorporated

Inventor： Jiri Stulemeijer ,  Christos Komninakis ,  Robert Wilson ,  Hakan Inanoglu ,  Ryan Scott Castro Spring ,  Antonino Scuderi ,  Michael Lee McCloud

IPC: H03F1/32 ,  H03F1/02 ,  H03F3/24

Abstract: Aspects of the present disclosure provide signal amplification. An example method generally includes amplifying a version of a first input signal with a power amplifier in a first state where a bias voltage of the power amplifier is set to a first voltage based on a first tracking mode; obtaining a first output signal of the power amplifier in a second state where the bias voltage is set to a second voltage less than the first voltage; determining a predistortion associated with the power amplifier based at least in part on the obtained first output signal; applying the predistortion to the first input signal; and amplifying a version of the predistorted first input signal with the power amplifier in a third state where the bias voltage is set to a third voltage based on a second tracking mode, wherein the third voltage is less than the first voltage.

公开(公告)号：US20160035899A1

公开(公告)日：2016-02-04

申请号：US14447068

申请日：2014-07-30

Applicant: QUALCOMM Incorporated

Inventor： Jiri Stulemeijer ,  Arnold Den Dekker ,  Maurice Adrianus de Jongh

IPC: H01L29/786 ,  H03K17/687 ,  H03K17/12

CPC classification number: H01L29/78606 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78603 ,  H03K17/122 ,  H03K17/687 ,  H03K2017/6875

Abstract: A device includes a silicon-on-insulator (SOI) substrate comprising a bulk silicon (Si) substrate, a buried oxide layer over the bulk Si substrate and a silicon device layer over the buried oxide layer, a first substrate tap and a second substrate tap located in the buried oxide layer and the silicon device layer, the first and second substrate taps in contact with the bulk Si substrate, and an initial depletion region located in the bulk Si substrate below the buried oxide layer and associated with at least one of the first substrate tap and the second substrate tap, the first substrate tap and the second substrate tap configured to increase the initial depletion region based on an applied bias voltage.

Abstract translation: 一种器件包括：绝缘体上硅（SOI）衬底，其包括体硅（Si）衬底，体Si衬底上的掩埋氧化物层和掩埋氧化物层上的硅器件层，第一衬底抽头和第二衬底 位于掩埋氧化物层和硅器件层中的第一和第二衬底，与第一和第二衬底接触的本体Si衬底以及位于掩埋氧化物层下面的本体Si衬底中的初始耗尽区，并与第一和第二衬底的至少一个 第一衬底抽头和第二衬底抽头，第一衬底抽头和第二衬底抽头被配置为基于施加的偏置电压来增加初始耗尽区域。