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    WIDEBAND FILTER WITH RESONATORS AND INDUCTORS
    2.
    发明申请
    WIDEBAND FILTER WITH RESONATORS AND INDUCTORS 有权

    公开(公告)号：US20210257989A1

    公开(公告)日：2021-08-19

    申请号：US17245901

    申请日：2021-04-30

    Applicant: QUALCOMM Incorporated

    Inventor： Kai LIU ,  Rui TANG ,  Changhan Hobie YUN ,  Mario Francisco VELEZ ,  Jonghae KIM

    IPC: H03H9/54 ,  H01P1/203 ,  H03H3/02 ,  H03H9/05

    Abstract: Aspects of the disclosure are directed to a bandpass filter including a first, second, third and fourth resonators, wherein the second and third resonators are in parallel, wherein the first resonator includes a first and second terminals, wherein the second resonator includes a second resonator top terminal and a second resonator bottom terminal, wherein the third resonator includes a third resonator top terminal and a third resonator bottom terminal, wherein the fourth resonator includes a third terminal and a fourth terminal; wherein the first terminal is coupled to the second resonator top terminal, wherein the second terminal is coupled to the third resonator top terminal, wherein the third terminal is coupled to the third resonator bottom terminal, wherein the fourth terminal is coupled to the second resonator bottom terminal; a first inductor coupled to the first and third terminals; and a second inductor coupled to the second and fourth terminals.

    ON-DIE ELECTROSTATIC DISCHARGE PROTECTION
    3.
    发明申请
    ON-DIE ELECTROSTATIC DISCHARGE PROTECTION 有权

    公开(公告)号：US20210057404A1

    公开(公告)日：2021-02-25

    申请号：US16990418

    申请日：2020-08-11

    Applicant: QUALCOMM Incorporated

    Inventor： Kai LIU ,  Xiaoju YU ,  Ye LU

    IPC: H01L27/01 ,  H01L27/02 ,  H01L23/60

    Abstract: Disclosed are devices and methods for on-die electrostatic discharge (ESD) protection in an electronic device. Aspects disclosed include an electronic device including a protected circuit disposed within a die having a first port and a second port. A first inductor is also disposed within the die and is electrically coupled to the first port. A second inductor is also disposed within the die and electrically coupled to the second port. The first inductor and the second inductor are routed in close proximity and are configured so the first inductor is out of phase with the second inductor.

    PASSIVE ON GLASS PLANARIZATION
    4.
    发明申请
    PASSIVE ON GLASS PLANARIZATION 审中-公开

    公开(公告)号：US20200350124A1

    公开(公告)日：2020-11-05

    申请号：US16748775

    申请日：2020-01-21

    Applicant: QUALCOMM Incorporated

    Inventor： Xia LI ,  Bin YANG ,  Kai LIU

    IPC: H01G4/30 ,  H01L49/02 ,  H01G4/33 ,  H01G4/012

    Abstract: Planarization of the M1 metal layer reduces surface roughness and fills in pin-holes for a more reliable capacitor. For example, a MIM capacitor on a glass substrate may begin with patterning of the M1 layer, deposition of a planarization material, etch back the planarization material to planarize the M1 surface and fill in any pits/pin-holes. In addition, multiple-cycles of deposit and etch back further reduce M1 surface roughness and fill in possible pin-holes to acceptable level.

    INDUCTIVE DEVICE
    5.
    发明申请
    INDUCTIVE DEVICE 有权

    公开(公告)号：US20240387092A1

    公开(公告)日：2024-11-21

    申请号：US18317366

    申请日：2023-05-15

    Applicant: QUALCOMM Incorporated

    Inventor： Kai LIU ,  Jui-Yi CHIU ,  Jonghae KIM ,  Nosun PARK ,  Je-Hsiung LAN

    IPC: H01F17/00 ,  H01F27/02 ,  H01F27/06 ,  H01F27/255 ,  H01F27/28 ,  H01F27/29

    Abstract: An inductive device includes multiple packaged devices, each including a body and a conductor layer within the body and a set of external connectors. The conductor layer of a packaged device includes a set of conductive lines electrically connected to the set of external connectors of the packaged device. Conductive lines of two packaged devices of the inductive device are at an angle relative to one another. External connectors of the packaged devices are coupled to one another to electrically connect the sets of conductive lines to define one or more coils, each coil having multiple turns and each turn including a conductive line of each packaged device.

    WIDEBAND FILTER WITH RESONATORS AND INDUCTORS
    7.
    发明申请
    WIDEBAND FILTER WITH RESONATORS AND INDUCTORS 审中-公开

    公开(公告)号：US20200266512A1

    公开(公告)日：2020-08-20

    申请号：US16279902

    申请日：2019-02-19

    Applicant: QUALCOMM Incorporated

    Inventor： Kai LIU ,  Rui TANG ,  Changhan Hobie YUN ,  Mario Francisco VELEZ ,  Jonghae KIM

    IPC: H01P1/203

    Abstract: Aspects of the disclosure are directed to a bandpass filter including a first, second, third and fourth resonators, wherein the second and third resonators are in parallel, wherein the first resonator includes a first and second terminals, wherein the second resonator includes a second resonator top terminal and a second resonator bottom terminal, wherein the third resonator includes a third resonator top terminal and a third resonator bottom terminal, wherein the fourth resonator includes a third terminal and a fourth terminal; wherein the first terminal is coupled to the second resonator top terminal, wherein the second terminal is coupled to the third resonator top terminal, wherein the third terminal is coupled to the third resonator bottom terminal, wherein the fourth terminal is coupled to the second resonator bottom terminal; a first inductor coupled to the first and third terminals; and a second inductor coupled to the second and fourth terminals.

    INTEGRATED INDUCTORS FOR POWER MANAGEMENT CIRCUITS
    8.
    发明申请
    INTEGRATED INDUCTORS FOR POWER MANAGEMENT CIRCUITS 审中-公开

    公开(公告)号：US20200211958A1

    公开(公告)日：2020-07-02

    申请号：US16232596

    申请日：2018-12-26

    Applicant: QUALCOMM Incorporated

    Inventor： Kai LIU ,  Gang LIN

    IPC: H01L23/522 ,  H01L49/02 ,  H01L23/00 ,  H01L23/552

    Abstract: A power supply package is disclosed, including a power management integrated circuit (PMIC) die with a plurality of switching circuits, and a plurality of integrated 3-dimensional (3D) inductors disposed around the PMIC die. Each 3D inductor corresponds to a switching circuit and is electrically coupled to first and second connections for the corresponding switching circuit. An integrated electromagnetic interference (EMI) shield is disposed between the PMIC and the 3D inductors.

    INTEGRATED DEVICE AND INTEGRATED PASSIVE DEVICE COMPRISING INDUCTIVELY COUPLED INDUCTORS SURROUNDED BY A MAGNETIC MATERIAL
    10.
    发明申请
    INTEGRATED DEVICE AND INTEGRATED PASSIVE DEVICE COMPRISING INDUCTIVELY COUPLED INDUCTORS SURROUNDED BY A MAGNETIC MATERIAL 有权

    公开(公告)号：US20250105145A1

    公开(公告)日：2025-03-27

    申请号：US18475080

    申请日：2023-09-26

    Applicant: QUALCOMM Incorporated

    Inventor： Kai LIU ,  Jui-Yi CHIU ,  Jonghae KIM

    IPC: H01L23/522 ,  H01L21/768

    Abstract: A device comprising a die substrate; a plurality of interconnects located over the die substrate, wherein the plurality of interconnects comprise a first plurality of interconnects comprising a first plurality of via interconnects, wherein the first plurality of interconnects are configured as a first inductor; and a second plurality of interconnects comprising a second plurality of via interconnects, wherein the second plurality of interconnects are configured as a second inductor; wherein the first inductor and the second inductor are intertwined, at least one magnetic layer that surrounds at least part of the first plurality of via interconnects and at least part of the second plurality of via interconnects; and at least one dielectric layer located over the die substrate.

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