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公开(公告)号:US20180284200A1
公开(公告)日:2018-10-04
申请号:US15474339
申请日:2017-03-30
Applicant: QUALCOMM Incorporated
Inventor: Wei-Chuan Chen , Wah Nam Hsu , Xia Li , Seung Hyuk Kang , Nicholas Ka Ming Stevens-Yu
Abstract: Tunnel magneto-resistive (TMR) sensors employing TMR devices with different magnetic field sensitivities for increased detection sensitivity are disclosed. For example, a TMR sensor may be used as a biosensor to detect the presence of biological materials. In aspects disclosed herein, free layers of at least two TMR devices in a TMR sensor are fabricated to exhibit different magnetic properties from each other (e.g., MR ratio, magnetic anisotropy, coercivity) so that each TMR device will exhibit a different change in resistance to a given magnetic stray field for increased magnetic field detection sensitivity. For example, the TMR devices may be fabricated to exhibit different magnetic properties such that one TMR device exhibits a greater change in resistance in the presence of a smaller magnetic stray field, and another TMR device exhibits a greater change in resistance in the presence of a larger magnetic stray field.
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公开(公告)号:US10410714B2
公开(公告)日:2019-09-10
申请号:US15709709
申请日:2017-09-20
Applicant: QUALCOMM Incorporated
Inventor: Xia Li , Seung Hyuk Kang , Venkat Rangan , Rashid Ahmed Akbar Attar , Nicholas Ka Ming Stevens-Yu
IPC: G11C11/00 , G11C11/419 , G11C11/56 , G11C7/10 , G11C8/16 , G11C11/418
Abstract: Multi-level cell (MLC) static random access memory (SRAM) (MLC SRAM) cells configured to perform multiplication operations are disclosed. In one aspect, an MLC SRAM cell includes SRAM bit cells, wherein data values stored in SRAM bit cells correspond to a multiple-bit value stored in the MLC SRAM cell that serves as first operand in multiplication operation. Voltage applied to read bit line is applied to each SRAM bit cell, wherein the voltage is an analog representation of a multiple-bit value that serves as a second operand in the multiplication operation. For each SRAM bit cell, if a particular binary data value is stored, a current correlating to the voltage of the read bit line is added to a current sum line. A magnitude of current on the current sum line is an analog representation of a multiple-bit product of the first operand multiplied by the second operand.
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公开(公告)号:US20190342106A1
公开(公告)日:2019-11-07
申请号:US15969043
申请日:2018-05-02
Applicant: QUALCOMM Incorporated
Inventor: Xia Li , Seung Hyuk Kang , Nicholas Ka Ming Stevens-Yu
IPC: H04L9/32 , G11C11/419 , G11C11/418 , G06F21/75
Abstract: Physically unclonable function (PUF) circuits employing multiple PUF memories to decouple a PUF challenge input from a PUF response output for enhanced security. The PUF circuit includes a PUF challenge memory and a PUF response memory. In response to a read operation, the PUF challenge memory uses a received PUF challenge input data word to address PUF challenge memory arrays therein to generate a plurality of intermediate PUF challenge output data words. The PUF response memory is configured to generate a second, final PUF response output data word in response to intermediate PUF challenge output data words. In this manner, it is more difficult to learn the challenge-response behavior of the PUF circuit, because the PUF challenge input data word does not directly address a memory array that stores memory states representing final logic values in the PUF response output data word.
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公开(公告)号:US10534047B2
公开(公告)日:2020-01-14
申请号:US15474339
申请日:2017-03-30
Applicant: QUALCOMM Incorporated
Inventor: Wei-Chuan Chen , Wah Nam Hsu , Xia Li , Seung Hyuk Kang , Nicholas Ka Ming Stevens-Yu
Abstract: Tunnel magneto-resistive (TMR) sensors employing TMR devices with different magnetic field sensitivities for increased detection sensitivity are disclosed. For example, a TMR sensor may be used as a biosensor to detect the presence of biological materials. In aspects disclosed herein, free layers of at least two TMR devices in a TMR sensor are fabricated to exhibit different magnetic properties from each other (e.g., MR ratio, magnetic anisotropy, coercivity) so that each TMR device will exhibit a different change in resistance to a given magnetic stray field for increased magnetic field detection sensitivity. For example, the TMR devices may be fabricated to exhibit different magnetic properties such that one TMR device exhibits a greater change in resistance in the presence of a smaller magnetic stray field, and another TMR device exhibits a greater change in resistance in the presence of a larger magnetic stray field.
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5.
公开(公告)号:US20190088309A1
公开(公告)日:2019-03-21
申请号:US15709709
申请日:2017-09-20
Applicant: QUALCOMM Incorporated
Inventor: Xia Li , Seung Hyuk Kang , Venkat Rangan , Rashid Ahmed Akbar Attar , Nicholas Ka Ming Stevens-Yu
IPC: G11C11/419 , G11C11/56
CPC classification number: G11C11/419 , G11C7/1006 , G11C8/16 , G11C11/418 , G11C11/565
Abstract: Multi-level cell (MLC) static random access memory (SRAM) (MLC SRAM) cells configured to perform multiplication operations are disclosed. In one aspect, an MLC SRAM cell includes SRAM bit cells, wherein data values stored in SRAM bit cells correspond to a multiple-bit value stored in the MLC SRAM cell that serves as first operand in multiplication operation. Voltage applied to read bit line is applied to each SRAM bit cell, wherein the voltage is an analog representation of a multiple-bit value that serves as a second operand in the multiplication operation. For each SRAM bit cell, if a particular binary data value is stored, a current correlating to the voltage of the read bit line is added to a current sum line. A magnitude of current on the current sum line is an analog representation of a multiple-bit product of the first operand multiplied by the second operand.
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