公开(公告)号：US20180048293A1

公开(公告)日：2018-02-15

申请号：US15352402

申请日：2016-11-15

Applicant: QUALCOMM Incorporated

Inventor： Timothy Donald GATHMAN ,  Ojas CHOKSI ,  Aleksandar Miodrag TASIC ,  Sasha VUJCIC ,  Chirag Dipak PATEL ,  Wu-Hsin CHEN ,  Klaas VAN ZALINGE

IPC: H03H11/04 ,  H03F3/19

CPC classification number: H03H11/0427 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451 ,  H03H11/126 ,  H03H2011/0483 ,  H03H2011/0488 ,  H04B1/0053 ,  H04B1/1036 ,  H04L5/0041 ,  H04W88/08

Abstract: A reconfigurable filter circuit has a first path including a transimpedance amplifier (TIA). The transimpedance amplifier has an input that receives an input current and an output that outputs a voltage. The reconfigurable filter circuit also includes a switchable feedback path. The switchable feedback path includes a first low-pass filter coupled to an output of the TIA. The switchable feedback path also includes a first switch to couple the feedback path to provide a feedback current to the first path resulting in a bandpass response in the output voltage when the switch is closed and a low-pass response in the output voltage when the switch is open.

公开(公告)号：US20240305327A1

公开(公告)日：2024-09-12

申请号：US18667309

申请日：2024-05-17

Applicant: QUALCOMM Incorporated

Inventor： Janakiram SANKARANARAYANAN ,  Jun TAN ,  Lai Kan LEUNG ,  Timothy Donald GATHMAN ,  Mehmet IPEK ,  Ojas CHOKSI

IPC: H04B1/18 ,  H03F3/19

CPC classification number: H04B1/18 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451

Abstract: An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.

公开(公告)号：US20230057499A1

公开(公告)日：2023-02-23

申请号：US17404948

申请日：2021-08-17

Applicant: QUALCOMM Incorporated

Inventor： Janakiram SANKARANARAYANAN ,  Jun TAN ,  Lai Kan LEUNG ,  Timothy Donald GATHMAN ,  Mehmet IPEK ,  Ojas CHOKSI

IPC: H04B1/18 ,  H03F3/19

Abstract: A reconfigurable amplifier includes a first transistor having a gate coupled to an input of the reconfigurable amplifier, and a source coupled to a ground. The reconfigurable amplifier also includes a gate control circuit, and a second transistor having a gate coupled to the gate control circuit, a source coupled to a drain of the first transistor, and a drain coupled to an output of the reconfigurable amplifier, wherein the gate control circuit is configured to output a bias voltage to the gate of the second transistor in a cascode mode, and output a switch voltage to the gate of the second transistor in a non-cascode mode. The reconfigurable amplifier further includes a load coupled to the output of the reconfigurable amplifier.

公开(公告)号：US20230283312A1

公开(公告)日：2023-09-07

申请号：US18317011

申请日：2023-05-12

Applicant: QUALCOMM Incorporated

Inventor： Janakiram SANKARANARAYANAN ,  Jun TAN ,  Lai Kan LEUNG ,  Timothy Donald GATHMAN ,  Mehmet IPEK ,  Ojas CHOKSI

IPC: H04B1/18 ,  H03F3/19

CPC classification number: H04B1/18 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451

Abstract: An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.