公开(公告)号：US20180048293A1

公开(公告)日：2018-02-15

申请号：US15352402

申请日：2016-11-15

Applicant: QUALCOMM Incorporated

Inventor： Timothy Donald GATHMAN ,  Ojas CHOKSI ,  Aleksandar Miodrag TASIC ,  Sasha VUJCIC ,  Chirag Dipak PATEL ,  Wu-Hsin CHEN ,  Klaas VAN ZALINGE

IPC: H03H11/04 ,  H03F3/19

CPC classification number: H03H11/0427 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451 ,  H03H11/126 ,  H03H2011/0483 ,  H03H2011/0488 ,  H04B1/0053 ,  H04B1/1036 ,  H04L5/0041 ,  H04W88/08

Abstract: A reconfigurable filter circuit has a first path including a transimpedance amplifier (TIA). The transimpedance amplifier has an input that receives an input current and an output that outputs a voltage. The reconfigurable filter circuit also includes a switchable feedback path. The switchable feedback path includes a first low-pass filter coupled to an output of the TIA. The switchable feedback path also includes a first switch to couple the feedback path to provide a feedback current to the first path resulting in a bandpass response in the output voltage when the switch is closed and a low-pass response in the output voltage when the switch is open.

公开(公告)号：US20190334539A1

公开(公告)日：2019-10-31

申请号：US15962967

申请日：2018-04-25

Applicant: QUALCOMM Incorporated

Inventor： Timothy Donald GATHMAN ,  Yuhua GUO ,  Lai Kan LEUNG ,  Elias DAGHER ,  Dinesh Jagannath ALLADI

IPC: H03M1/12 ,  H04B1/16

Abstract: A receiver may include a time-interleaved charge sampler comprising a charge sampler switch in series with a charge sampler capacitor. The receiver may also include a current buffer configured to drive the time-interleaved charge sampler.

公开(公告)号：US20230057499A1

公开(公告)日：2023-02-23

申请号：US17404948

申请日：2021-08-17

Applicant: QUALCOMM Incorporated

Inventor： Janakiram SANKARANARAYANAN ,  Jun TAN ,  Lai Kan LEUNG ,  Timothy Donald GATHMAN ,  Mehmet IPEK ,  Ojas CHOKSI

IPC: H04B1/18 ,  H03F3/19

Abstract: A reconfigurable amplifier includes a first transistor having a gate coupled to an input of the reconfigurable amplifier, and a source coupled to a ground. The reconfigurable amplifier also includes a gate control circuit, and a second transistor having a gate coupled to the gate control circuit, a source coupled to a drain of the first transistor, and a drain coupled to an output of the reconfigurable amplifier, wherein the gate control circuit is configured to output a bias voltage to the gate of the second transistor in a cascode mode, and output a switch voltage to the gate of the second transistor in a non-cascode mode. The reconfigurable amplifier further includes a load coupled to the output of the reconfigurable amplifier.

公开(公告)号：US20190097608A1

公开(公告)日：2019-03-28

申请号：US15712406

申请日：2017-09-22

Applicant: QUALCOMM Incorporated

Inventor： Timothy Donald GATHMAN ,  Lai Kan LEUNG ,  Chirag Dipak PATEL ,  Rajagopalan RANGARAJAN

IPC: H03H11/42 ,  H04B1/48 ,  H04B5/00

CPC classification number: H03H11/08 ,  H03H11/0444 ,  H03H11/342 ,  H03H11/42 ,  H03H2011/0494 ,  H04B1/48 ,  H04B5/0012 ,  H04B5/0075

Abstract: Certain aspects of the present disclosure relate to multi-band filter architectures and methods for filtering signals using the multi-band filter architectures. One example multi-band filter generally includes a transconductance-capacitance (gm-C) filter and a reconfigurable load impedance coupled to an output of the gm-C filter, the reconfigurable load impedance comprising a first gyrator circuit coupled to a second gyrator circuit.

公开(公告)号：US20230283312A1

公开(公告)日：2023-09-07

申请号：US18317011

申请日：2023-05-12

Applicant: QUALCOMM Incorporated

Inventor： Janakiram SANKARANARAYANAN ,  Jun TAN ,  Lai Kan LEUNG ,  Timothy Donald GATHMAN ,  Mehmet IPEK ,  Ojas CHOKSI

IPC: H04B1/18 ,  H03F3/19

CPC classification number: H04B1/18 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451

Abstract: An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.

公开(公告)号：US20190296692A1

公开(公告)日：2019-09-26

申请号：US16054921

申请日：2018-08-03

Applicant: QUALCOMM Incorporated

Inventor： Chirag Dipak PATEL ,  Lai Kan LEUNG ,  Xinmin YU ,  Timothy Donald GATHMAN

IPC: H03F1/02 ,  H03F1/32 ,  H03F3/45 ,  G05F1/56 ,  G05F3/26

Abstract: A switchable amplifier exhibits multiple modes of operation including a current mode and a voltage mode. The switchable amplifier includes a first transistor having a gate terminal coupled to a drain terminal, one or more second transistors having a gate terminal coupled to the gate terminal of the first transistor, a third transistor and a bias resistor across the third transistor. The third transistor is coupled between the gate terminal of the first transistor and the gate terminal of the one or more second transistors.

公开(公告)号：US20240305327A1

公开(公告)日：2024-09-12

申请号：US18667309

申请日：2024-05-17

Applicant: QUALCOMM Incorporated

Inventor： Janakiram SANKARANARAYANAN ,  Jun TAN ,  Lai Kan LEUNG ,  Timothy Donald GATHMAN ,  Mehmet IPEK ,  Ojas CHOKSI

IPC: H04B1/18 ,  H03F3/19

CPC classification number: H04B1/18 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451

Abstract: An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.

公开(公告)号：US20240056043A1

公开(公告)日：2024-02-15

申请号：US17886887

申请日：2022-08-12

Applicant: QUALCOMM Incorporated

Inventor： Rahul SINGH ,  Mehran BAKHSHIANI ,  Timothy Donald GATHMAN ,  Yuhua GUO ,  Elias DAGHER

IPC: H03F3/45 ,  H04B1/10 ,  H03H11/04 ,  H04B1/04 ,  H03F1/14 ,  H03M1/12

CPC classification number: H03F3/45273 ,  H04B1/10 ,  H03H11/04 ,  H04B1/04 ,  H03F1/14 ,  H03M1/12

Abstract: An apparatus, including a positive input for an input differential signal; a negative input for the input differential signal; a positive output for an output differential signal; a negative output for the output differential signal; a first capacitor including a first terminal coupled to the positive output; a second capacitor including a first terminal coupled to the negative output; and a switching network configured to: couple a second terminal of the first capacitor to the negative input or a positive node based on a mode signal; and couple a second terminal of the second capacitor to the positive input or a negative node based on the mode signal.

公开(公告)号：US20190028087A1

公开(公告)日：2019-01-24

申请号：US15867206

申请日：2018-01-10

Applicant: QUALCOMM Incorporated

Inventor： Wei ZHUO ,  Timothy Donald GATHMAN ,  Wenbang XU ,  Li-chung CHANG ,  Rui LI ,  Rahul KARMAKER

IPC: H03H11/02

Abstract: A filter circuit may include a first path having a first complex baseband filter. The circuit may further include a second path having a second complex baseband filter. The circuit may further include a combiner coupled to an output of the first complex baseband filter and an output of the second complex baseband filter.