公开(公告)号：US20170093420A1

公开(公告)日：2017-03-30

申请号：US15014865

申请日：2016-02-03

Applicant: QUALCOMM Incorporated

Inventor： Omid RAJAEE ,  Liang DAI ,  Ganesh KIRAN

IPC: H03M1/38 ,  H03M1/10

CPC classification number: H03M1/38 ,  H03M1/1009 ,  H03M1/1014 ,  H03M1/188

Abstract: Certain aspects of the present disclosure provide a segmented successive approximation register (SAR) analog-to-digital converter (ADC). One example ADC generally includes a plurality of SAR ADC circuits each associated with a different voltage range segment of a voltage range for the ADC. Each SAR ADC circuit is configured to receive an analog signal input to the ADC and to output a digital signal based on the analog signal, the digital signal being representative of a voltage level of the analog signal when the voltage level of the analog signal is within the segment associated with the SAR ADC circuit. In certain aspects, the SAR ADC may include logic configured to control a digital output of the ADC based on one or more of the digital signals representative of the voltage level of the analog signal output by one or more of the plurality of SAR ADC circuits.