公开(公告)号：US20200241070A1

公开(公告)日：2020-07-30

申请号：US16262550

申请日：2019-01-30

Applicant: QUALCOMM Incorporated

Inventor： Punit KISHORE ,  Tomer Rafael BEN-CHEN ,  Sharon GRAIF

IPC: G01R31/3177 ,  G01R31/317 ,  G01R31/28 ,  G06F13/42

Abstract: A method of in-system structural testing of a system-on-chip (SoC) using a peripheral interface port is described. The method including enabling a scan interface controller of the SoC through the peripheral interface port. The method also includes streaming structural test patterns in the SoC through the scan interface controller.

公开(公告)号：US20200233031A1

公开(公告)日：2020-07-23

申请号：US16255214

申请日：2019-01-23

Applicant: QUALCOMM Incorporated

Inventor： Jais ABRAHAM ,  Punit KISHORE

IPC: G01R31/317 ,  G01R31/3185

Abstract: Certain aspects of the present disclosure provide a circuit for testing processor cores. For example, certain aspects provide a circuit having a deserializer having at least one input coupled to at least one input node of the circuit and having a first plurality of outputs, a plurality of processor cores having inputs coupled to the first plurality of outputs of the deserializer, and a serializer having inputs coupled to a second plurality of outputs of the plurality of processor cores.