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公开(公告)号：US12199581B2
公开(公告)日：2025-01-14
申请号：US18324683
申请日：2023-05-26
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay , James M. Retz
Abstract: Equalizer circuitry includes a differential target voltage input, an equalizer output, a first operational amplifier, and a second operational amplifier. The differential target voltage input includes a target voltage input node and an inverted target voltage input node. The first operational amplifier and the second operational amplifier are coupled in series between the differential target voltage input and the equalizer output. The first operational amplifier is configured to receive a target voltage signal and provide an intermediate signal based on the target voltage input signal. The second operational amplifier is configured to receive the intermediate signal and an inverted target voltage signal and provide an output signal to the equalizer output. The first operational amplifier and the second operational amplifier are interconnected with one or more passive components such that a transfer function between the differential target voltage input and the equalizer output is a second-order complex-zero function.
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公开(公告)号：US11742804B2
公开(公告)日：2023-08-29
申请号：US17852857
申请日：2022-06-29
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay , Michael J. Murphy
CPC classification number: H03F3/189 , H02M3/07 , H03F2200/102 , H03F2200/105
Abstract: A switch controller for charge pump tracker circuitry is disclosed. The switch controller includes first monitoring circuitry configured to monitor a first voltage across a first flying capacitor during a first discharging phase. A second monitoring circuitry is configured to monitor a second voltage across a second flying capacitor during a second discharging phase. Further included is boost logic circuitry in communication with the first monitoring circuitry and the second monitoring circuitry, wherein the boost logic circuitry is configured in response to control a first switch network coupled to the first flying capacitor and a second switch network coupled to the second flying capacitor so that the first discharging phase and the second discharging phase alternate in an interleaved mode, and so that the first discharging phase and the second discharging phase are in phase during a parallel boost mode.
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公开(公告)号：US11671064B2
公开(公告)日：2023-06-06
申请号：US17142350
申请日：2021-01-06
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay , James M. Retz
CPC classification number: H03G5/165 , H03F1/0233 , H03F3/45475 , H03F2200/105 , H03F2200/451 , H03G2201/103
Abstract: Equalizer circuitry includes a differential target voltage input, an equalizer output, a first operational amplifier, and a second operational amplifier. The differential target voltage input includes a target voltage input node and an inverted target voltage input node. The first operational amplifier and the second operational amplifier are coupled in series between the differential target voltage input and the equalizer output. The first operational amplifier is configured to receive a target voltage signal and provide an intermediate signal based on the target voltage input signal. The second operational amplifier is configured to receive the intermediate signal and an inverted target voltage signal and provide an output signal to the equalizer output. The first operational amplifier and the second operational amplifier are interconnected with one or more passive components such that a transfer function between the differential target voltage input and the equalizer output is a second-order complex-zero function.
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4.发明授权公开(公告)号：US11575317B2
公开(公告)日：2023-02-07
申请号：US16703951
申请日：2019-12-05
Applicant: Qorvo US, Inc.
Inventor： Michael J. Murphy , Michael R. Kay
Abstract: A switching regulator system having a switching regulator configured to generate regulated voltage pulses at a switching output in response to a setpoint of an output voltage at a setpoint input and feedback of the output voltage at a feedback input is disclosed. A power inductor is coupled between the switching output and a filtered output, and a filter capacitor is coupled between the filtered output and a fixed voltage node. A transistor having a control input is coupled between the filtered output and the fixed voltage node. A transition comparator has a first comparator input coupled to the setpoint input, a second comparator input coupled to the feedback input, and a comparator output coupled to the control input, wherein the transition comparator is configured to monitor for a setpoint voltage dropping below a feedback voltage and in response turn on the transistor to discharge the filter capacitor.
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公开(公告)号：US11539290B2
公开(公告)日：2022-12-27
申请号：US17218904
申请日：2021-03-31
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
Abstract: A power management circuit operable with low battery is provided. The power management circuit is configured to generate a time-variant average power tracking (APT) voltage based on a battery voltage supplied by a voltage source (e.g., battery). In examples disclosed herein, the power management circuit can be configured to remain operable when the battery voltage drops below a low battery threshold. Specifically, the power management circuit maintains the time-variant APT voltage at a constant level in response to the battery voltage dropping below the low battery threshold to thereby avoid drawing a rush current from the voltage source. As a result, a wireless device employing the power management circuit can remain operable with low battery to continue to support critical applications.
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Patent Agency Ranking
公开(公告)号：US11539289B2
公开(公告)日：2022-12-27
申请号：US16807575
申请日：2020-03-03
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Jeffrey D. Potts , Michael R. Kay , Michael J. Murphy
Abstract: A multi-level charge pump (MCP) circuit is provided. The MCP circuit includes a multi-level voltage circuit configured to receive a supply voltage and generate a low-frequency voltage. The multi-level voltage circuit includes a first switch path, a second switch path, and a third switch path each having a respective on-resistance and coupled in parallel between an input node and an output node. In a non-limiting example, the multi-level voltage circuit is configured to activate the first switch path and at least one of the second switch path and the third switch path when the multi-level voltage circuit generates the low-frequency voltage that equals the supply voltage. By activating at least two of the three switch paths to generate the low-frequency voltage, it may be possible to reduce an equivalent resistance of the multi-level voltage circuit, thus helping to improve efficiency and reduce power loss of the MCP circuit.
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公开(公告)号：US20220057820A1
公开(公告)日：2022-02-24
申请号：US17325482
申请日：2021-05-20
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
IPC: G05F1/46
Abstract: A power management circuit operable to reduce energy loss is provided. The power management circuit is configured to provide a time-variant voltage(s) to a power amplifier(s) for amplifying an analog signal(s). To achieve best possible operating efficiency at the power amplifier(s), the time-variant voltage(s) needs to rise and fall frequently and quickly in accordance with power fluctuations of the analog signal(s). The power management circuit stores an electrical potential energy (e.g., capacitive energy) when the time-variant voltage(s) increases and discharges the electrical potential energy when the time-variant voltage(s) decreases. In embodiments disclosed herein, the power management circuit is configured to harvest a portion of the discharged electrical potential energy to thereby charge a battery. By harvesting the discharged electrical potential energy, it is possible to prolong battery life concurrent to supporting fast and frequent voltage changes.
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公开(公告)号：US20210211112A1
公开(公告)日：2021-07-08
申请号：US17142350
申请日：2021-01-06
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay , James M. Retz
Abstract: Equalizer circuitry includes a differential target voltage input, an equalizer output, a first operational amplifier, and a second operational amplifier. The differential target voltage input includes a target voltage input node and an inverted target voltage input node. The first operational amplifier and the second operational amplifier are coupled in series between the differential target voltage input and the equalizer output. The first operational amplifier is configured to receive a target voltage signal and provide an intermediate signal based on the target voltage input signal. The second operational amplifier is configured to receive the intermediate signal and an inverted target voltage signal and provide an output signal to the equalizer output. The first operational amplifier and the second operational amplifier are interconnected with one or more passive components such that a transfer function between the differential target voltage input and the equalizer output is a second-order complex-zero function.
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公开(公告)号：US11018638B2
公开(公告)日：2021-05-25
申请号：US16284023
申请日：2019-02-25
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
Abstract: A multimode envelope tracking (ET) circuit and related apparatus is provided. The multimode ET circuit is configured to provide an ET voltage(s) to an amplifier circuit(s) for amplifying a radio frequency (RF) signal(s) that may correspond to a wider range of modulation bandwidth. In this regard, the multimode ET circuit is configured to switch dynamically and opportunistically between different operation modes based on the modulation bandwidth of the RF signal(s). In examples discussed herein, the multimode ET circuit is configured to support a single amplifier circuit in a high-modulation-bandwidth mode and an additional amplifier circuit(s) in a mid-modulation-bandwidth mode and a low-modulation-bandwidth mode. By switching dynamically and opportunistically between different operation modes, it may be possible to reduce undesired series resonance that may cause distortion in the ET voltage(s), thus helping to improve efficiency and performance of the amplifier circuit(s) supported by the multimode ET circuit.
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公开(公告)号：US10985702B2
公开(公告)日：2021-04-20
申请号：US16421905
申请日：2019-05-24
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay
Abstract: An envelope tracking system is disclosed having an envelope tracking integrated circuit (ETIC) with a first tracker having a first supply output and a second tracker having a second supply output, wherein the ETIC has a first mode in which only one of the first and second trackers supplies voltage and a second mode in which the first and second trackers both supply voltage. A first notch filter is coupled to the first supply output and a second notch filter is coupled to the second supply output. A mode switch coupled between the first supply output and the second supply output is configured to couple the first notch filter and the second notch filter in parallel in the first mode and open the mode switch to decouple the first notch filter from the second notch filter in the second mode in response to first and second switch control signals, respectively.
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