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    Vehicle sound generation device
    2.
    发明授权
    Vehicle sound generation device 有权

    公开(公告)号：US12057101B2

    公开(公告)日：2024-08-06

    申请号：US17118615

    申请日：2020-12-11

    Applicant: Mazda Motor Corporation

    Inventor： Yasuhiko Miura ,  Keisuke Agusa

    IPC: G10K15/02 ,  H03G3/30 ,  H04R1/02 ,  H04R3/00

    CPC classification number: G10K15/02 ,  H03G3/301 ,  H04R1/025 ,  H04R3/00 ,  H03G2201/103 ,  H04R2499/13

    Abstract: A vehicle sound generation device includes a sound control circuit that sets a plurality of frequencies according to a number of motor revolutions and sound pressures to be applied to the plurality of frequencies and generates a synthetic sound signal representing a synthetic sound, and a travel situation estimation circuit that estimates a first travel situation in which the driver accelerates or decelerates a vehicle at a first rate and a second travel situation in which the driver accelerates or decelerates the vehicle at a second rate greater than the first rate, and the sound control circuit changes the magnitudes of the sound pressures to be applied to the plurality of frequencies based on whether the first travel situation, the second travel situation or neither the first travel situation and the second travel situation is estimated.

    CIRCUITRY FOR AND METHODS OF GAIN CONTROL
    4.
    发明公开
    CIRCUITRY FOR AND METHODS OF GAIN CONTROL 审中-公开

    公开(公告)号：US20240154592A1

    公开(公告)日：2024-05-09

    申请号：US18505734

    申请日：2023-11-09

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Andrew J. HOWLETT ,  Michael CHANDLER-PAGE ,  David P. SINGLETON ,  Erich P. ZWYSSIG ,  Craig MCADAM

    IPC: H03G3/30 ,  H03F3/04

    CPC classification number: H03G3/30 ,  H03F3/04 ,  H03G2201/103

    Abstract: An integrated circuit (IC), comprising: a first input pin for receiving a first input signal; a first converter configured to convert the first input signal to a first output signal; a first gain stage configured to apply a first gain to the first output signal; gain update circuitry configured to: output a first external gain control signal to a first output pin of the IC; and subsequently output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, wherein output of the first internal gain control signal is delayed relative to output of the first external gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first input pin and the first gain stage, wherein the gain update circuitry comprises level detection circuitry configured to determine a signal level of the first input signal or the first output signal.

    High Bandwidth VGA/CTLE Receiver With DC Gain Flattening and Common-Mode Correction Across Process, Voltage, and Temperature
    7.
    发明公开
    High Bandwidth VGA/CTLE Receiver With DC Gain Flattening and Common-Mode Correction Across Process, Voltage, and Temperature 审中-公开

    公开(公告)号：US20240106687A1

    公开(公告)日：2024-03-28

    申请号：US17953020

    申请日：2022-09-26

    Applicant: Micron Technology, Inc.

    Inventor： Michael John Shay

    IPC: H04L25/03 ,  H03G3/30

    CPC classification number: H04L25/03057 ,  H03G3/30 ,  H03G2201/103

    Abstract: A device includes an amplifying device that when in operation transmits a data signal and a reference signal to a decision feedback equalizer (DFE) circuit. The amplifying device includes a variable gain amplifier (VGA) that when in operation generates the reference signal as having a predetermined gain relative to a received input signal and a continuous-time linear equalizer (CTLE) that operate to mitigate inter-symbol interference (IR) on the data signal from a data stream comprising the data signal. The device further includes correction circuitry coupled to the amplifying device, wherein the correction circuitry when in operation mitigates variation in the predetermined gain of the VGA or variation in an output common-mode voltage of the VGA.

    Auto-Calibration of Power Line Communication Signal Leveling
    8.
    发明公开
    Auto-Calibration of Power Line Communication Signal Leveling 审中-公开

    公开(公告)号：US20240097635A1

    公开(公告)日：2024-03-21

    申请号：US17948632

    申请日：2022-09-20

    Applicant: Bendix Commercial Vehicle Systems LLC

    Inventor： Tandi Wijaya ,  Michael D. Cremona ,  Thomas J. Hayes ,  Ran Wei

    IPC: H03G3/30 ,  B60R16/023 ,  H03F3/04 ,  H04B3/54

    CPC classification number: H03G3/30 ,  B60R16/023 ,  H03F3/04 ,  H04B3/54 ,  H03G2201/103

    Abstract: A system for calibrating signals received over a power line within a vehicle includes a signal conditioning circuit that converts the analog input signals into digital input signals. In one embodiment the circuit includes an adjustable gain circuit that outputs an amplifier gain signal establishing an amplifier gain level and an amplifier that outputs amplified signals responsive to the analog input signals and the amplifier gain signal. In another embodiment, the circuit includes a bias circuit that outputs a bias signal establishing a bias level and a comparator that generates the digital input signals responsive to the analog input signals and the bias signal. A controller receives the digital input signals and generates, depending on the embodiment, one or more control signals configured to control the configuration of the amplifier gain signal and amplifier gain level and/or the bias signal and the bias level.

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