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公开(公告)号:US11024566B2
公开(公告)日:2021-06-01
申请号:US16653127
申请日:2019-10-15
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Shinichi Uchida , Akio Ono , Shinichi Kuwabara , Yasutaka Nakashiba
IPC: H01L23/495 , H01L23/522 , H01L25/065 , H01L23/31 , H01L23/00 , H01L23/64
Abstract: A first semiconductor chip and a second semiconductor chip are stacked such that a first inductor and a second inductor face each other. An insulating sheet is disposed between the first semiconductor chip and the second semiconductor chip. The sealing member seals the first semiconductor chip, the second semiconductor chip, and the insulating sheet. The sealing member is disposed both between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip.
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公开(公告)号:US10886213B2
公开(公告)日:2021-01-05
申请号:US16984710
申请日:2020-08-04
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Teruhiro Kuwajima , Yasutaka Nakashiba , Akira Matsumoto , Akio Ono , Tetsuya Iida
Abstract: A semiconductor device has a coil and wirings under the coil. In addition, a distance between the upper face of the wirings and the bottom face of the coil is 7 μm or larger, and the wirings have a plurality of linear wiring parts each wiring width of which is 1 μm or smaller. In addition, the linear wiring parts do not configure a loop wiring, and the coil and the linear wiring parts are overlapped with each other in planar view.
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